Re: [Yaffs] Bad eraseblocks and NAND / ECC layouts

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著者: Rong Shen
日付:  
To: Robin Iddon
CC: yaffs
題目: Re: [Yaffs] Bad eraseblocks and NAND / ECC layouts
On Fri, May 29, 2009 at 6:05 PM, Robin Iddon <> wrote:
> A word of caution on this:
>>
>> 1. completely wipe the flash, data and spare area
>>
>
> We found that forcing erasure of bad block markers on Micron MLC FLASH part
> (29F32G08QAA) left the block in a state where it could not be programmed
> again (i.e. the bad block marker could not be set again).  This is fair


Bad block marker is just non-FF byte/word in the spare area, if all
bits are stuck in 1, the manufacturer wouldn't have had been able to
mark it in the first place. Strange though. I could be wrong but it's
more like a faulty chip or h/w issue.

> enough - there are no guarantees from the manufacturer that bad blocks can
> be reprogrammed if erased.
>
> At the time we did this as we had a h/w problem that was making our s/w
> think good blocks were bad; having corrected the h/w issue we wanted to
> recover all the incorrectly marked bad blocks.
>
> We ended up replacing the FLASH parts on the afflicted boards.
>
> To address this issue properly I think the only choice is to program a bad
> block table into a working block; I would guess only one block would need to
> be sacrificed, but deciding which block to use and which layer to implement
> such a thing at would require more time and effort than it is perhaps worth
> - just don't erase bad blocks!
>
> Hope this helps,
> Robin
>
>
>
>
>
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--
Rong