Author: nick
Date: 2010-08-22 22:25:46 +0100 (Sun, 22 Aug 2010)
New Revision: 1205
Added:
balloon/branches/menuconfig/kernel/2.6.36-rc1/
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon2-samosa.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-ac97.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-cpufreq.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-ethernet.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-g_ether.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-i2s.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-lmr5428.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-megapug.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-minipug.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-minipugfb.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-nand.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-pcmcia.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-powerfail.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-samosa-podpoint.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-samosa-uart.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-samosa.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-sl40.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-tsl2560.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-vga.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3config
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3config-CUED
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3config-podpoint
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3config-tcl-sl40
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3config.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3config.tcl.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3specs.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/cross-build.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/initrd.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/series-CUED
balloon/branches/menuconfig/kernel/2.6.36-rc1/series-podpoint
balloon/branches/menuconfig/kernel/2.6.36-rc1/series-tcl-sl40
balloon/branches/menuconfig/kernel/2.6.36-rc1/series-tcl-sl90
balloon/branches/menuconfig/kernel/2.6.36-rc1/series-tcl-specs
balloon/branches/menuconfig/kernel/2.6.36-rc1/series.default
balloon/branches/menuconfig/kernel/2.6.36-rc1/yaffsconfig.patch
balloon/branches/menuconfig/kernel/2.6.36-rc1/yaffsrootmode.patch
Log:
add first cut at 2.6.36-rc1 integration. CUED only attempted. yaffs support yet to be fixed
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon2-samosa.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon2-samosa.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon2-samosa.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,186 @@
+Balloon2 Samosa Bus support
+
+Saomsa is a simple 16 bit bus implemented over the nand/smartmedia bus
+by the CPLD on balloon2
+
+from: Nick Bane <nick@cecomputing.co.uk>
+
+Signed-off-by: Wookey <wookey@wookware.org>
+
+Index: linux-2.6.27.5/drivers/char/samosa.c
+===================================================================
+--- linux-2.6.27.5.orig/drivers/char/samosa.c 2008-11-20 12:24:03.000000000 +0000
++++ linux-2.6.27.5/drivers/char/samosa.c 2008-11-20 12:26:11.000000000 +0000
+@@ -101,6 +101,172 @@
+
+ #endif
+
++#ifdef CONFIG_MACH_BALLOON2
++
++/*
++ * samosa bus support - Balloon2
++ * On Balloon2 the samosa bus is a generalised extension of the nand bus
++ * using the original SmartMedia socket address
++ */
++#include <asm/arch/balloon2_cpld.h>
++
++#define SAMOSA_CLE_BIT 0
++#define SAMOSA_ALE_BIT 1
++#define SAMOSA_NCE0_BIT 2
++#define SAMOSA_NCE1_BIT 3
++#define SAMOSA_NCE2_BIT 4
++#define SAMOSA_NCE3_BIT 5
++#define SAMOSA_NSE_BIT 6
++#define SAMOSA_NWP_BIT 7
++#define SAMOSA_SIXTEEN_BIT SAMOSA_CLE_BIT
++#define SAMOSA_PLAIT_BUS_BIT 0
++
++/* samosa bus access */
++unsigned int balloon_samosa_get_data_address(void);
++int balloon_samosa_device_selected(unsigned int d);
++int balloon_samosa_device_select(int d, int plait_bus);
++void balloon_samosa_set_ctrl(u8 mask, u8 value);
++int balloon_samosa_sm_present(void);
++int balloon_samosa_nand_ready(void *device);
++
++#define BALLOON_SAMOSA_IO_ADDR 0xf3000000 /* Common NAND data port */
++#define BALLOON_SAMOSA_CTRL_ADDR 0xf3800000 /* Common NAND ALE CLE and NCEx write-only port */
++#define BALLOON_SAMOSA_CTRL2_ADDR 0xf3600000 /* Second control register */
++
++#define BALLOON_SAMOSA_CE_MASK ((1 << SAMOSA_NCE0_BIT) | \
++ (1 << SAMOSA_NCE1_BIT) | \
++ (1 << SAMOSA_NCE2_BIT) | \
++ (1 << SAMOSA_NCE3_BIT))
++
++/* standby values */
++static u8 balloon_samosa_ctrl_image = (1 << SAMOSA_NWP_BIT) |
++ (1 << SAMOSA_NCE0_BIT) | (1 << SAMOSA_NCE1_BIT) |
++ (1 << SAMOSA_NCE2_BIT) | (1 << SAMOSA_NCE3_BIT);
++static u8 balloon_samosa_ctrl2_image;
++
++unsigned int balloon_samosa_get_data_address(void)
++{
++ return BALLOON_SAMOSA_IO_ADDR;
++}
++EXPORT_SYMBOL(balloon_samosa_get_data_address);
++
++static int balloon_samosa_plait_bus(void)
++{
++ if (balloon_has(BALLOON_SAMOSA_PLAIT_SYS)) {
++ balloon_samosa_ctrl2_image |= (1 << SAMOSA_PLAIT_BUS_BIT);
++ writeb(balloon_samosa_ctrl2_image, BALLOON_SAMOSA_CTRL2_ADDR);
++ }
++ return 0;
++}
++
++static int balloon_samosa_unplait_bus(void)
++{
++ if (balloon_has(BALLOON_SAMOSA_PLAIT_SYS)) {
++ balloon_samosa_ctrl2_image &= ~(1 << SAMOSA_PLAIT_BUS_BIT);
++ writeb(balloon_samosa_ctrl2_image, BALLOON_SAMOSA_CTRL2_ADDR);
++ }
++ return 0;
++}
++
++int balloon_samosa_device_selected(unsigned int d)
++{
++ switch (d) {
++ case 0:
++ return (balloon_samosa_ctrl_image &
++ (1 << SAMOSA_NCE0_BIT)) ? 0 : 1;
++ case 1:
++ return (balloon_samosa_ctrl_image &
++ (1 << SAMOSA_NCE1_BIT)) ? 0 : 1;
++ case 2:
++ return (balloon_samosa_ctrl_image &
++ (1 << SAMOSA_NCE2_BIT)) ? 0 : 1;
++ case 3:
++ return (balloon_samosa_ctrl_image &
++ (1 << SAMOSA_NCE3_BIT)) ? 0 : 1;
++ default:
++ return 0;
++ }
++}
++EXPORT_SYMBOL(balloon_samosa_device_selected);
++
++int balloon_samosa_device_select(int d, int plait_bus)
++{
++ if (balloon_samosa_device_selected(d))
++ return 0;
++
++ switch (d) {
++ case -1:
++ /* Deselect everything */
++ balloon_samosa_ctrl_image |= BALLOON_SAMOSA_CE_MASK;
++ break;
++ case 0:
++ if ((balloon_samosa_ctrl_image & BALLOON_SAMOSA_CE_MASK) !=
++ BALLOON_SAMOSA_CE_MASK) {
++ pr_warn("balloon_samosa_device_select: Trying to select chip %d but balloon_samosa_ctrl_image is 0x%x\n",
++ d, balloon_samosa_ctrl_image);
++ }
++ balloon_samosa_ctrl_image |= BALLOON_SAMOSA_CE_MASK;
++ balloon_samosa_ctrl_image &= ~(1 << SAMOSA_NCE0_BIT);
++ break;
++ case 1:
++ if ((balloon_samosa_ctrl_image & BALLOON_SAMOSA_CE_MASK) !=
++ BALLOON_SAMOSA_CE_MASK) {
++ pr_warn("balloon_samosa_device_select: Trying to select chip %d but balloon_samosa_ctrl_image is 0x%x\n",
++ d, balloon_samosa_ctrl_image);
++ }
++ balloon_samosa_ctrl_image |= BALLOON_SAMOSA_CE_MASK;
++ balloon_samosa_ctrl_image &= ~(1 << SAMOSA_NCE1_BIT);
++ break;
++ case 2:
++ if ((balloon_samosa_ctrl_image & BALLOON_SAMOSA_CE_MASK) !=
++ BALLOON_SAMOSA_CE_MASK) {
++ pr_warn("balloon_samosa_device_select: Trying to select chip %d but balloon_samosa_ctrl_image is 0x%x\n",
++ d, balloon_samosa_ctrl_image);
++ }
++ balloon_samosa_ctrl_image |= BALLOON_SAMOSA_CE_MASK;
++ balloon_samosa_ctrl_image &= ~(1 << SAMOSA_NCE2_BIT);
++ break;
++ case 3:
++ if ((balloon_samosa_ctrl_image & BALLOON_SAMOSA_CE_MASK) !=
++ BALLOON_SAMOSA_CE_MASK) {
++ pr_warn("balloon_samosa_device_select: Trying to select chip %d but balloon_samosa_ctrl_image is 0x%x\n",
++ d, balloon_samosa_ctrl_image);
++ }
++ balloon_samosa_ctrl_image |= BALLOON_SAMOSA_CE_MASK;
++ balloon_samosa_ctrl_image &= ~(1 << SAMOSA_NCE3_BIT);
++ break;
++ default:
++ BUG();
++ }
++ writeb(balloon_samosa_ctrl_image, BALLOON_SAMOSA_CTRL_ADDR);
++
++ /* default is plaited for 8-bit nand access */
++ if (plait_bus)
++ balloon_samosa_plait_bus();
++ else
++ balloon_samosa_unplait_bus();
++
++ return 0;
++}
++EXPORT_SYMBOL(balloon_samosa_device_select);
++
++void balloon_samosa_set_ctrl(u8 mask, u8 value)
++{
++ balloon_samosa_ctrl_image &= ~mask;
++ balloon_samosa_ctrl_image |= value;
++
++ writeb(balloon_samosa_ctrl_image, BALLOON_SAMOSA_CTRL_ADDR);
++}
++EXPORT_SYMBOL(balloon_samosa_set_ctrl);
++
++int balloon_samosa_nand_ready(void *mtd_device)
++{
++ return GPLR & BALLOON_GPIO205_NAND_RNB;
++}
++EXPORT_SYMBOL(balloon_samosa_nand_ready);
++
++#endif /* end of balloon2 version */
++
+ /* samosa bus support */
+
+ #define to_samosa_driver(drv) (container_of((drv), struct samosa_driver, \
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-ac97.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-ac97.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-ac97.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,96 @@
+Index: linux-2.6.34/sound/pci/ac97/ac97_patch.c
+===================================================================
+--- linux-2.6.34.orig/sound/pci/ac97/ac97_patch.c 2010-05-22 19:42:47.000000000 +0100
++++ linux-2.6.34/sound/pci/ac97/ac97_patch.c 2010-05-22 19:51:56.000000000 +0100
+@@ -3905,6 +3905,10 @@
+ static int patch_ucb1400(struct snd_ac97 * ac97)
+ {
+ ac97->build_ops = &patch_ucb1400_ops;
++
++ /* UCB1400 supports powerdown */
++ ac97->scaps |= AC97_SCAP_POWER_SAVE;
++
+ /* enable headphone driver and smart low power mode by default */
+ snd_ac97_write_cache(ac97, 0x6a, 0x0050);
+ snd_ac97_write_cache(ac97, 0x6c, 0x0030);
+Index: linux-2.6.34/sound/pci/ac97/ac97_codec.c
+===================================================================
+--- linux-2.6.34.orig/sound/pci/ac97/ac97_codec.c 2010-05-22 19:42:47.000000000 +0100
++++ linux-2.6.34/sound/pci/ac97/ac97_codec.c 2010-05-23 10:19:05.000000000 +0100
+@@ -273,6 +273,7 @@
+ {
+ if (!snd_ac97_valid_reg(ac97, reg))
+ return;
++ snd_printk(KERN_DEBUG "snd_ac97_write reg %02x: %04x\n", reg,value);
+ if ((ac97->id & 0xffffff00) == AC97_ID_ALC100) {
+ /* Fix H/W bug of ALC100/100P */
+ if (reg == AC97_MASTER || reg == AC97_HEADPHONE)
+@@ -328,6 +329,7 @@
+ if (!snd_ac97_valid_reg(ac97, reg))
+ return;
+ mutex_lock(&ac97->reg_mutex);
++ snd_printk(KERN_DEBUG "snd_ac97_write_cache reg %02x: %04x\n", reg,value);
+ ac97->regs[reg] = value;
+ ac97->bus->ops->write(ac97, reg, value);
+ set_bit(reg, ac97->reg_accessed);
+@@ -354,6 +356,8 @@
+
+ if (!snd_ac97_valid_reg(ac97, reg))
+ return -EINVAL;
++ snd_printk(KERN_DEBUG "snd_ac97_update reg %02x: %04x\n", reg,value);
++
+ mutex_lock(&ac97->reg_mutex);
+ change = ac97->regs[reg] != value;
+ if (change) {
+@@ -386,6 +390,7 @@
+
+ if (!snd_ac97_valid_reg(ac97, reg))
+ return -EINVAL;
++ snd_printk(KERN_DEBUG "snd_ac97_update_bits reg %02x: %04x %04x\n", reg,mask,value);
+ mutex_lock(&ac97->reg_mutex);
+ change = snd_ac97_update_bits_nolock(ac97, reg, mask, value);
+ mutex_unlock(&ac97->reg_mutex);
+@@ -2479,6 +2484,7 @@
+ * are accessed..!
+ */
+ if (test_bit(i, ac97->reg_accessed)) {
++// printk(KERN_NOTICE "Restoring AC97 register %02x: %04x\n",i,ac97->regs[i]);
+ snd_ac97_write(ac97, i, ac97->regs[i]);
+ snd_ac97_read(ac97, i);
+ }
+Index: linux-2.6.34/sound/arm/pxa2xx-ac97-lib.c
+===================================================================
+--- linux-2.6.34.orig/sound/arm/pxa2xx-ac97-lib.c 2010-05-22 19:42:47.000000000 +0100
++++ linux-2.6.34/sound/arm/pxa2xx-ac97-lib.c 2010-05-22 19:51:56.000000000 +0100
+@@ -137,15 +137,17 @@
+ gsr_bits = 0;
+
+ /* warm reset broken on Bulverde, so manually keep AC97 reset high */
+- pxa27x_assert_ac97reset(reset_gpio, 1);
++/* pxa27x_assert_ac97reset(reset_gpio, 1); */
+ udelay(10);
+ GCR |= GCR_WARM_RST;
+- pxa27x_assert_ac97reset(reset_gpio, 0);
++/* pxa27x_assert_ac97reset(reset_gpio, 0); */
+ udelay(500);
+ }
+
+ static inline void pxa_ac97_cold_pxa27x(void)
+ {
++ int timeout = 1000;
++
+ GCR &= GCR_COLD_RST; /* clear everything but nCRST */
+ GCR &= ~GCR_COLD_RST; /* then assert nCRST */
+
+@@ -156,7 +158,10 @@
+ udelay(5);
+ clk_disable(ac97conf_clk);
+ GCR = GCR_COLD_RST;
+- udelay(50);
++
++ /* allow codec time to sort itself out */
++ while (!(GSR & (GSR_PCR | GSR_SCR)) && timeout--)
++ mdelay(10);
+ }
+ #endif
+
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-cpufreq.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-cpufreq.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-cpufreq.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,30 @@
+Index: linux-2.6.34-rc7/arch/arm/mach-pxa/cpufreq-pxa2xx.c
+===================================================================
+--- linux-2.6.34-rc7.orig/arch/arm/mach-pxa/cpufreq-pxa2xx.c 2010-05-10 02:36:28.000000000 +0100
++++ linux-2.6.34-rc7/arch/arm/mach-pxa/cpufreq-pxa2xx.c 2010-05-15 18:19:25.000000000 +0100
+@@ -156,11 +156,11 @@
+ static pxa_freqs_t pxa27x_freqs[] = {
+ {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1), 900000, 1705000 },
+ {156000, 104000, PXA27x_CCCR(1, 8, 3), 0, CCLKCFG2(1, 0, 1), 1000000, 1705000 },
+- {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1), 1180000, 1705000 },
+- {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1), 1250000, 1705000 },
+- {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1), 1350000, 1705000 },
+- {520000, 208000, PXA27x_CCCR(1, 16, 5), 1, CCLKCFG2(1, 0, 1), 1450000, 1705000 },
+- {624000, 208000, PXA27x_CCCR(1, 16, 6), 1, CCLKCFG2(1, 0, 1), 1550000, 1705000 }
++ {208000, 208000, PXA27x_CCCR(1, 16, 2), 0, CCLKCFG2(0, 0, 1), 1180000, 1705000 },
++ {312000, 208000, PXA27x_CCCR(1, 16, 3), 0, CCLKCFG2(0, 0, 1), 1250000, 1705000 },
++ {416000, 208000, PXA27x_CCCR(1, 16, 4), 0, CCLKCFG2(0, 0, 1), 1350000, 1705000 },
++ {520000, 208000, PXA27x_CCCR(1, 16, 5), 0, CCLKCFG2(0, 0, 1), 1450000, 1705000 },
++ {624000, 208000, PXA27x_CCCR(1, 16, 6), 0, CCLKCFG2(0, 0, 1), 1550000, 1705000 }
+ };
+
+ #define NUM_PXA27x_FREQS ARRAY_SIZE(pxa27x_freqs)
+@@ -231,7 +231,7 @@
+ static void pxa27x_guess_max_freq(void)
+ {
+ if (!pxa27x_maxfreq) {
+- pxa27x_maxfreq = 416000;
++ pxa27x_maxfreq = 520000;
+ printk(KERN_INFO "PXA CPU 27x max frequency not defined "
+ "(pxa27x_maxfreq), assuming pxa271 with %dkHz maxfreq\n",
+ pxa27x_maxfreq);
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-ethernet.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-ethernet.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-ethernet.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,19 @@
+Enable CS89x0 Ethernet driver to be built for Balloon3
+
+from: Wookey <wookey@wookware.org>
+
+Signed-off-by: Wookey <wookey@wookware.org>
+
+Index: linux-2.6.36-rc1/drivers/net/Kconfig
+===================================================================
+--- linux-2.6.36-rc1.orig/drivers/net/Kconfig 2010-08-16 01:41:37.000000000 +0100
++++ linux-2.6.36-rc1/drivers/net/Kconfig 2010-08-22 17:08:45.000000000 +0100
+@@ -1464,7 +1464,7 @@
+ config CS89x0
+ tristate "CS89x0 support"
+ depends on NET_ETHERNET && (ISA || EISA || MACH_IXDP2351 \
+- || ARCH_IXDP2X01 || MACH_MX31ADS)
++ || ARCH_IXDP2X01 || MACH_MX31ADS || MACH_BALLOON3)
+ ---help---
+ Support for CS89x0 chipset based Ethernet cards. If you have a
+ network (Ethernet) card of this type, say Y and read the
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-g_ether.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-g_ether.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-g_ether.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,43 @@
+Index: linux-2.6.36-rc1/drivers/usb/gadget/Kconfig
+===================================================================
+--- linux-2.6.36-rc1.orig/drivers/usb/gadget/Kconfig 2010-08-16 01:41:37.000000000 +0100
++++ linux-2.6.36-rc1/drivers/usb/gadget/Kconfig 2010-08-22 17:10:06.000000000 +0100
+@@ -679,6 +679,21 @@
+ XP, you'll need to download drivers from Microsoft's website; a URL
+ is given in comments found in that info file.
+
++config USB_ETH_RNDIS_COMPAT
++ bool "RNDIS old kernel compatability support"
++ depends on USB_ETH_RNDIS
++ default n
++ help
++ Kernels prior to 2.6.30.5 have a problem with the host
++ identifying a combined CDC_SUBSET and RNDIS gadget as being
++ CDC_SUBSET because the match is dependent on being identified
++ as coming from SA1110 hardware. This kludge makes the driver appear
++ to be from hardware identifer 0x0203. The kludge is horrid and should
++ go away once the fix in kernel 2.6.30.5 is commonplace.
++
++ If you say "y" here, the Ethernet gadget driver will fake being
++ from hardware device ID 0x203.
++
+ config USB_ETH_EEM
+ bool "Ethernet Emulation Model (EEM) support"
+ depends on USB_ETH
+Index: linux-2.6.36-rc1/drivers/usb/gadget/ether.c
+===================================================================
+--- linux-2.6.36-rc1.orig/drivers/usb/gadget/ether.c 2010-08-16 01:41:37.000000000 +0100
++++ linux-2.6.36-rc1/drivers/usb/gadget/ether.c 2010-08-22 17:10:06.000000000 +0100
+@@ -335,6 +335,12 @@
+ }
+
+ gcnum = usb_gadget_controller_number(gadget);
++#ifdef CONFIG_USB_ETH_RNDIS_COMPAT
++ // kludge for host kernels pre 2.6.30.5 with CDC_SUBSET and RNDIS
++ if ((gcnum >= 0) && has_rndis() && !can_support_ecm(cdev->gadget))
++ device_desc.bcdDevice = cpu_to_le16(0x0203);
++ else
++#endif
+ if (gcnum >= 0)
+ device_desc.bcdDevice = cpu_to_le16(0x0300 | gcnum);
+ else {
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-i2s.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-i2s.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-i2s.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,1024 @@
+Index: linux-2.6.29.1/sound/soc/codecs/Kconfig
+===================================================================
+--- linux-2.6.29.1.orig/sound/soc/codecs/Kconfig 2009-09-07 15:04:01.000000000 +0100
++++ linux-2.6.29.1/sound/soc/codecs/Kconfig 2009-09-07 15:23:12.000000000 +0100
+@@ -36,6 +36,7 @@
+ select SND_SOC_WM8990 if I2C
+ select SND_SOC_WM9712 if SND_SOC_AC97_BUS
+ select SND_SOC_WM9713 if SND_SOC_AC97_BUS
++ select SND_SOC_SL90DSP
+ help
+ Normally ASoC codec drivers are only built if a machine driver which
+ uses them is also built since they are only usable with a machine
+@@ -149,3 +150,6 @@
+
+ config SND_SOC_WM9713
+ tristate
++
++config SND_SOC_SL90DSP
++ tristate
+\ No newline at end of file
+Index: linux-2.6.29.1/sound/soc/codecs/Makefile
+===================================================================
+--- linux-2.6.29.1.orig/sound/soc/codecs/Makefile 2009-09-07 15:04:02.000000000 +0100
++++ linux-2.6.29.1/sound/soc/codecs/Makefile 2009-09-07 15:23:12.000000000 +0100
+@@ -25,6 +25,7 @@
+ snd-soc-wm8990-objs := wm8990.o
+ snd-soc-wm9712-objs := wm9712.o
+ snd-soc-wm9713-objs := wm9713.o
++snd-soc-sl90dsp-objs := sl90dsp.o
+
+ obj-$(CONFIG_SND_SOC_AC97_CODEC) += snd-soc-ac97.o
+ obj-$(CONFIG_SND_SOC_AD1980) += snd-soc-ad1980.o
+@@ -53,3 +54,4 @@
+ obj-$(CONFIG_SND_SOC_WM8990) += snd-soc-wm8990.o
+ obj-$(CONFIG_SND_SOC_WM9712) += snd-soc-wm9712.o
+ obj-$(CONFIG_SND_SOC_WM9713) += snd-soc-wm9713.o
++obj-$(CONFIG_SND_SOC_SL90DSP) += snd-soc-sl90dsp.o
+\ No newline at end of file
+Index: linux-2.6.29.1/sound/soc/pxa/Kconfig
+===================================================================
+--- linux-2.6.29.1.orig/sound/soc/pxa/Kconfig 2009-09-07 15:04:02.000000000 +0100
++++ linux-2.6.29.1/sound/soc/pxa/Kconfig 2009-09-07 15:23:12.000000000 +0100
+@@ -97,3 +97,12 @@
+ help
+ Say Y if you want to add support for SoC audio on the
+ Marvell Zylonite reference platform.
++
++config SND_PXA2XX_SOC_BALLOON3_SL90
++ tristate "SoC Audio support for Balloon 3 SL90"
++ depends on SND_PXA2XX_SOC && MACH_BALLOON3
++ select SND_PXA2XX_SOC_I2S
++ select SND_SOC_SL90DSP
++ help
++ Say Y if you want to add support for SL90 I2S audio
++ on Balloon 3.
+Index: linux-2.6.29.1/sound/soc/pxa/Makefile
+===================================================================
+--- linux-2.6.29.1.orig/sound/soc/pxa/Makefile 2009-09-07 15:04:02.000000000 +0100
++++ linux-2.6.29.1/sound/soc/pxa/Makefile 2009-09-07 15:23:12.000000000 +0100
+@@ -18,6 +18,7 @@
+ snd-soc-em-x270-objs := em-x270.o
+ snd-soc-palm27x-objs := palm27x.o
+ snd-soc-zylonite-objs := zylonite.o
++snd-soc-balloon3-sl90-objs := balloon3-sl90.o
+
+ obj-$(CONFIG_SND_PXA2XX_SOC_CORGI) += snd-soc-corgi.o
+ obj-$(CONFIG_SND_PXA2XX_SOC_POODLE) += snd-soc-poodle.o
+@@ -27,3 +28,4 @@
+ obj-$(CONFIG_SND_PXA2XX_SOC_EM_X270) += snd-soc-em-x270.o
+ obj-$(CONFIG_SND_PXA2XX_SOC_PALM27X) += snd-soc-palm27x.o
+ obj-$(CONFIG_SND_SOC_ZYLONITE) += snd-soc-zylonite.o
++obj-$(CONFIG_SND_PXA2XX_SOC_BALLOON3_SL90) += snd-soc-balloon3-sl90.o
+\ No newline at end of file
+Index: linux-2.6.29.1/sound/soc/pxa/balloon3-sl90.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.29.1/sound/soc/pxa/balloon3-sl90.c 2009-09-07 15:23:12.000000000 +0100
+@@ -0,0 +1,209 @@
++/*
++ * balloon3_sl90.c -- SoC audio for Balloon 3 in SL90
++ *
++ * Copyright 2005 Wolfson Microelectronics PLC.
++ * Copyright 2005 Openedhand Ltd.
++ * Copyright 2009 Martin-Jones Technology ltd
++ *
++ * Authors: Liam Girdwood <lrg@slimlogic.co.uk>
++ * Richard Purdie <richard@openedhand.com>
++ * Chris Jones <chris@martin-jones.com>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the
++ * Free Software Foundation; either version 2 of the License, or (at your
++ * option) any later version.
++ */
++
++#include <linux/module.h>
++#include <linux/moduleparam.h>
++#include <linux/timer.h>
++#include <linux/interrupt.h>
++#include <linux/platform_device.h>
++#include <linux/gpio.h>
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/soc.h>
++#include <sound/soc-dapm.h>
++
++#include <asm/mach-types.h>
++#include <mach/pxa-regs.h>
++#include <mach/hardware.h>
++#include <mach/balloon3.h>
++#include <mach/audio.h>
++
++#include "../codecs/sl90dsp.h"
++#include "pxa2xx-pcm.h"
++#include "pxa2xx-i2s.h"
++
++
++static int balloon3_sl90_startup(struct snd_pcm_substream *substream)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_codec *codec = rtd->socdev->codec;
++
++ /* do startup stuff */
++
++ return 0;
++}
++
++static void balloon3_sl90_shutdown(struct snd_pcm_substream *substream)
++{
++ /* do shutdown stuff */
++}
++
++static int balloon3_sl90_hw_params(struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
++ struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
++ unsigned int clk = 0;
++ int ret = 0;
++
++ switch (params_rate(params)) {
++ case 8000:
++ case 16000:
++ case 48000:
++ case 96000:
++ clk = 12288000;
++ break;
++ case 11025:
++ case 22050:
++ case 44100:
++ clk = 11289600;
++ break;
++ }
++
++ /* set codec DAI configuration */
++ ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
++ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFS);
++ if (ret < 0)
++ return ret;
++
++ /* set cpu DAI configuration */
++ ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
++ SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFS);
++ if (ret < 0)
++ return ret;
++
++ /* set the codec system clock for DAC and ADC */
++ /*ret = snd_soc_dai_set_sysclk(codec_dai, WM8731_SYSCLK, clk,
++ SND_SOC_CLOCK_IN); */
++ if (ret < 0)
++ return ret;
++
++ /* set the I2S system clock as input because it's slave */
++ ret = snd_soc_dai_set_sysclk(cpu_dai, PXA2XX_I2S_SYSCLK, 0,
++ SND_SOC_CLOCK_IN);
++ if (ret < 0)
++ return ret;
++
++ return 0;
++}
++
++static struct snd_soc_ops balloon3_sl90_ops = {
++ .startup = balloon3_sl90_startup,
++ .hw_params = balloon3_sl90_hw_params,
++ .shutdown = balloon3_sl90_shutdown,
++};
++
++/* balloon3_sl90 machine dapm widgets */
++static const struct snd_soc_dapm_widget sl90dsp_dapm_widgets[] = {
++SND_SOC_DAPM_LINE("DSP Output", NULL),
++};
++
++/* Corgi machine audio map (connections to the codec pins) */
++static const struct snd_soc_dapm_route audio_map[] = {
++ {"Output to DSP", NULL, "RDSPOUT"},
++ {"Output to DSP", NULL, "LDSPOUT"},
++
++ {"Input from DSP", NULL, "LDSPIN"},
++ {"Input from DSP", NULL, "RDSPIN"},
++
++};
++
++/*
++ * Logic for a sl90dsp
++ */
++static int balloon3_sl90_sl90dsp_init(struct snd_soc_codec *codec)
++{
++ int i, err;
++
++ snd_soc_dapm_nc_pin(codec, "LLINEIN");
++ snd_soc_dapm_nc_pin(codec, "RLINEIN");
++
++ /* Add balloon3_sl90 specific widgets */
++ snd_soc_dapm_new_controls(codec, sl90dsp_dapm_widgets,
++ ARRAY_SIZE(sl90dsp_dapm_widgets));
++
++ /* Set up balloon3_sl90 specific audio path audio_map */
++ snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
++
++ snd_soc_dapm_sync(codec);
++ return 0;
++}
++
++/* balloon3_sl90 digital audio interface glue - connects codec <--> CPU */
++static struct snd_soc_dai_link balloon3_sl90_dai = {
++ .name = "SL90DSP",
++ .stream_name = "SL90DSP",
++ .cpu_dai = &pxa_i2s_dai,
++ .codec_dai = &sl90dsp_dai,
++ .init = balloon3_sl90_sl90dsp_init,
++ .ops = &balloon3_sl90_ops,
++};
++
++/* balloon3_sl90 audio machine driver */
++static struct snd_soc_card snd_soc_balloon3_sl90 = {
++ .name = "Balloon3 SL90",
++ .platform = &pxa2xx_soc_platform,
++ .dai_link = &balloon3_sl90_dai,
++ .num_links = 1,
++};
++
++/* balloon3_sl90 audio private data */
++static struct sl90dsp_setup_data balloon3_sl90_sl90dsp_setup = {
++ .i2c_bus = 0,
++ .i2c_address = 0x1b,
++};
++
++/* balloon3_sl90 audio subsystem */
++static struct snd_soc_device balloon3_sl90_snd_devdata = {
++ .card = &snd_soc_balloon3_sl90,
++ .codec_dev = &soc_codec_dev_sl90dsp,
++ .codec_data = &balloon3_sl90_sl90dsp_setup,
++};
++
++static struct platform_device *balloon3_sl90_snd_device;
++
++static int __init balloon3_sl90_init(void)
++{
++ int ret;
++
++ balloon3_sl90_snd_device = platform_device_alloc("soc-audio", -1);
++ if (!balloon3_sl90_snd_device)
++ return -ENOMEM;
++
++ platform_set_drvdata(balloon3_sl90_snd_device, &balloon3_sl90_snd_devdata);
++ balloon3_sl90_snd_devdata.dev = &balloon3_sl90_snd_device->dev;
++ ret = platform_device_add(balloon3_sl90_snd_device);
++
++ if (ret)
++ platform_device_put(balloon3_sl90_snd_device);
++
++ return ret;
++}
++
++static void __exit balloon3_sl90_exit(void)
++{
++ platform_device_unregister(balloon3_sl90_snd_device);
++}
++
++module_init(balloon3_sl90_init);
++module_exit(balloon3_sl90_exit);
++
++/* Module information */
++MODULE_AUTHOR("Chris Jones");
++MODULE_DESCRIPTION("ALSA SoC Balloon 3 SL90");
++MODULE_LICENSE("GPL");
+Index: linux-2.6.29.1/sound/soc/codecs/sl90dsp.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.29.1/sound/soc/codecs/sl90dsp.c 2009-08-03 22:23:25.000000000 +0100
+@@ -0,0 +1,690 @@
++/*
++ * sl90dsp.c -- SL90 DSP ALSA SoC Audio driver
++ *
++ * Copyright 2005 Openedhand Ltd.
++ * 2009 Martin-Jones Technology Ltd
++ *
++ * Author: Richard Purdie <richard@openedhand.com>
++ * Chris Jones <chris@martin-jones.com>
++ *
++ * Based on wm8731.c by Richard Purdie
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/module.h>
++#include <linux/moduleparam.h>
++#include <linux/init.h>
++#include <linux/delay.h>
++#include <linux/pm.h>
++#include <linux/i2c.h>
++#include <linux/platform_device.h>
++#include <linux/spi/spi.h>
++#include <sound/core.h>
++#include <sound/pcm.h>
++#include <sound/pcm_params.h>
++#include <sound/soc.h>
++#include <sound/soc-dapm.h>
++#include <sound/initval.h>
++
++#include "sl90dsp.h"
++
++#define SL90DSP_VERSION "0.01"
++
++struct snd_soc_codec_device soc_codec_dev_sl90dsp;
++
++/* codec private data */
++struct sl90dsp_priv {
++ unsigned int sysclk;
++};
++
++/*
++ * SL90 DSP register cache
++ */
++static const u16 sl90dsp_reg[SL90DSP_CACHEREGNUM] = {
++ 0x0000, 0x007f, 0x007f, 0x007f
++};
++
++/*
++ * read SL90DSP register cache
++ */
++static inline unsigned int sl90dsp_read_reg_cache(struct snd_soc_codec *codec,
++ unsigned int reg)
++{
++ u16 *cache = codec->reg_cache;
++ if (reg >= SL90DSP_CACHEREGNUM)
++ return -1;
++ return cache[reg];
++}
++
++/*
++ * write sl90dsp register cache
++ */
++static inline void sl90dsp_write_reg_cache(struct snd_soc_codec *codec,
++ u16 reg, unsigned int value)
++{
++ u16 *cache = codec->reg_cache;
++ if (reg >= SL90DSP_CACHEREGNUM)
++ return;
++ cache[reg] = value;
++}
++
++/*
++ * write to the SL90DSP register space
++ */
++static int sl90dsp_write(struct snd_soc_codec *codec, unsigned int reg,
++ unsigned int value)
++{
++ u8 data[2];
++
++ /* data is
++ * D15..D9 SL90DSP register offset
++ * D8...D0 register data
++ */
++ data[0] = (reg << 1) | ((value >> 8) & 0x0001);
++ data[1] = value & 0x00ff;
++
++ sl90dsp_write_reg_cache(codec, reg, value);
++ if (codec->hw_write(codec->control_data, data, 2) == 2)
++ return 0;
++ else
++ return -EIO;
++}
++
++static const char *sl90dsp_input_select[] = {"Input from DSP"};
++
++static const struct soc_enum sl90dsp_enum[] = {
++ SOC_ENUM_SINGLE(SL90DSP_MISCCONTROL, 1, 1, sl90dsp_input_select),
++};
++
++static const struct snd_kcontrol_new sl90dsp_snd_controls[] = {
++
++SOC_SINGLE("Balloon Volume", SL90DSP_BALLOONVOLUME, 0, 127, 0),
++SOC_SINGLE("GSM Volume", SL90DSP_GSMVOLUME, 0, 127, 0),
++SOC_SINGLE("Ext Volume", SL90DSP_EXTVOLUME, 0, 127, 0),
++
++};
++
++/* add non dapm controls */
++static int sl90dsp_add_controls(struct snd_soc_codec *codec)
++{
++ int err, i;
++
++ for (i = 0; i < ARRAY_SIZE(sl90dsp_snd_controls); i++) {
++ err = snd_ctl_add(codec->card,
++ snd_soc_cnew(&sl90dsp_snd_controls[i],
++ codec, NULL));
++ if (err < 0)
++ return err;
++ }
++
++ return 0;
++}
++
++/* Output Mixer */
++static const struct snd_kcontrol_new sl90dsp_output_mixer_controls[] = {
++SOC_DAPM_SINGLE("Random Switch", SL90DSP_MISCCONTROL, 3, 1, 0),
++};
++
++/* Input mux */
++static const struct snd_kcontrol_new sl90dsp_input_mux_controls =
++SOC_DAPM_ENUM("Input Select", sl90dsp_enum[0]);
++
++static const struct snd_soc_dapm_widget sl90dsp_dapm_widgets[] = {
++SND_SOC_DAPM_MIXER("Output Mixer", SL90DSP_MISCCONTROL, 4, 1,
++ &sl90dsp_output_mixer_controls[0],
++ ARRAY_SIZE(sl90dsp_output_mixer_controls)),
++SND_SOC_DAPM_DAC("DAC", "Output to DSP", SL90DSP_MISCCONTROL, 3, 1),
++SND_SOC_DAPM_OUTPUT("LDSPOUT"),
++SND_SOC_DAPM_OUTPUT("RDSPOUT"),
++SND_SOC_DAPM_ADC("ADC", "Input from DSP", SL90DSP_MISCCONTROL, 2, 1),
++SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0, &sl90dsp_input_mux_controls),
++SND_SOC_DAPM_INPUT("LDSPIN"),
++SND_SOC_DAPM_INPUT("RDSPIN"),
++};
++
++static const struct snd_soc_dapm_route intercon[] = {
++ /* output mixer */
++ {"Output Mixer", "Output to DSP", "DAC"},
++
++ /* outputs */
++ {"RDSPOUT", NULL, "Output Mixer"},
++ {"LDSPOUT", NULL, "Output Mixer"},
++
++ /* input mux */
++ {"Input Mux", "Input from DSP", "Input from DSP"},
++ {"ADC", NULL, "Input Mux"},
++
++ /* inputs */
++ {"Input from DSP", NULL, "LDSPIN"},
++ {"Input from DSP", NULL, "RDSPIN"},
++};
++
++static int sl90dsp_add_widgets(struct snd_soc_codec *codec)
++{
++ snd_soc_dapm_new_controls(codec, sl90dsp_dapm_widgets,
++ ARRAY_SIZE(sl90dsp_dapm_widgets));
++
++ snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
++
++ snd_soc_dapm_new_widgets(codec);
++ return 0;
++}
++
++struct _coeff_div {
++ u32 mclk;
++ u32 rate;
++ u16 fs;
++ u8 sr:4;
++ u8 bosr:1;
++ u8 usb:1;
++};
++
++/* codec mclk clock divider coefficients */
++static const struct _coeff_div coeff_div[] = {
++ /* 48k */
++ {12288000, 48000, 256, 0x0, 0x0, 0x0},
++ {18432000, 48000, 384, 0x0, 0x1, 0x0},
++ {12000000, 48000, 250, 0x0, 0x0, 0x1},
++
++ /* 32k */
++ {12288000, 32000, 384, 0x6, 0x0, 0x0},
++ {18432000, 32000, 576, 0x6, 0x1, 0x0},
++ {12000000, 32000, 375, 0x6, 0x0, 0x1},
++
++ /* 8k */
++ {12288000, 8000, 1536, 0x3, 0x0, 0x0},
++ {18432000, 8000, 2304, 0x3, 0x1, 0x0},
++ {11289600, 8000, 1408, 0xb, 0x0, 0x0},
++ {16934400, 8000, 2112, 0xb, 0x1, 0x0},
++ {12000000, 8000, 1500, 0x3, 0x0, 0x1},
++
++ /* 96k */
++ {12288000, 96000, 128, 0x7, 0x0, 0x0},
++ {18432000, 96000, 192, 0x7, 0x1, 0x0},
++ {12000000, 96000, 125, 0x7, 0x0, 0x1},
++
++ /* 44.1k */
++ {11289600, 44100, 256, 0x8, 0x0, 0x0},
++ {16934400, 44100, 384, 0x8, 0x1, 0x0},
++ {12000000, 44100, 272, 0x8, 0x1, 0x1},
++
++ /* 88.2k */
++ {11289600, 88200, 128, 0xf, 0x0, 0x0},
++ {16934400, 88200, 192, 0xf, 0x1, 0x0},
++ {12000000, 88200, 136, 0xf, 0x1, 0x1},
++};
++
++static inline int get_coeff(int mclk, int rate)
++{
++ int i;
++
++ for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
++ if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
++ return i;
++ }
++ return 0;
++}
++
++static int sl90dsp_hw_params(struct snd_pcm_substream *substream,
++ struct snd_pcm_hw_params *params,
++ struct snd_soc_dai *dai)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_device *socdev = rtd->socdev;
++ struct snd_soc_codec *codec = socdev->codec;
++ struct sl90dsp_priv *sl90dsp = codec->private_data;
++ //u16 iface = sl90dsp_read_reg_cache(codec, SL90DSP_IFACE) & 0xfff3;
++ u16 iface=0;
++ int i = get_coeff(sl90dsp->sysclk, params_rate(params));
++ u16 srate = (coeff_div[i].sr << 2) |
++ (coeff_div[i].bosr << 1) | coeff_div[i].usb;
++
++ /*sl90dsp_write(codec, SL90DSP_SRATE, srate);*/
++
++ /* bit size */
++ switch (params_format(params)) {
++ case SNDRV_PCM_FORMAT_S16_LE:
++ break;
++ case SNDRV_PCM_FORMAT_S20_3LE:
++ iface |= 0x0004;
++ break;
++ case SNDRV_PCM_FORMAT_S24_LE:
++ iface |= 0x0008;
++ break;
++ }
++
++ /*sl90dsp_write(codec, SL90DSP_IFACE, iface);*/
++ return 0;
++}
++
++static int sl90dsp_pcm_prepare(struct snd_pcm_substream *substream,
++ struct snd_soc_dai *dai)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_device *socdev = rtd->socdev;
++ struct snd_soc_codec *codec = socdev->codec;
++
++ /* set active */
++ /*sl90dsp_write(codec, SL90DSP_ACTIVE, 0x0001);*/
++
++ return 0;
++}
++
++static void sl90dsp_shutdown(struct snd_pcm_substream *substream,
++ struct snd_soc_dai *dai)
++{
++ struct snd_soc_pcm_runtime *rtd = substream->private_data;
++ struct snd_soc_device *socdev = rtd->socdev;
++ struct snd_soc_codec *codec = socdev->codec;
++
++ /* deactivate */
++ if (!codec->active) {
++ udelay(50);
++ /*sl90dsp_write(codec, SL90DSP_ACTIVE, 0x0);*/
++ }
++}
++
++static int sl90dsp_mute(struct snd_soc_dai *dai, int mute)
++{
++ struct snd_soc_codec *codec = dai->codec;
++ //u16 mute_reg = sl90dsp_read_reg_cache(codec, SL90DSP_APDIGI) & 0xfff7;
++
++// if (mute)
++ /*sl90dsp_write(codec, SL90DSP_APDIGI, mute_reg | 0x8);*/
++ //else
++ //sl90dsp_write(codec, SL90DSP_APDIGI, mute_reg);
++ return 0;
++}
++
++static int sl90dsp_set_dai_sysclk(struct snd_soc_dai *codec_dai,
++ int clk_id, unsigned int freq, int dir)
++{
++ struct snd_soc_codec *codec = codec_dai->codec;
++ struct sl90dsp_priv *sl90dsp = codec->private_data;
++
++ switch (freq) {
++ case 11289600:
++ case 12000000:
++ case 12288000:
++ case 16934400:
++ case 18432000:
++ sl90dsp->sysclk = freq;
++ return 0;
++ }
++ return -EINVAL;
++}
++
++
++static int sl90dsp_set_dai_fmt(struct snd_soc_dai *codec_dai,
++ unsigned int fmt)
++{
++ struct snd_soc_codec *codec = codec_dai->codec;
++ u16 iface = 0;
++
++ /* set master/slave audio interface */
++ switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
++ case SND_SOC_DAIFMT_CBM_CFM:
++ iface |= 0x0040;
++ break;
++ case SND_SOC_DAIFMT_CBS_CFS:
++ break;
++ default:
++ return -EINVAL;
++ }
++
++ /* interface format */
++ switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
++ case SND_SOC_DAIFMT_I2S:
++ iface |= 0x0002;
++ break;
++ case SND_SOC_DAIFMT_RIGHT_J:
++ break;
++ case SND_SOC_DAIFMT_LEFT_J:
++ iface |= 0x0001;
++ break;
++ case SND_SOC_DAIFMT_DSP_A:
++ iface |= 0x0003;
++ break;
++ case SND_SOC_DAIFMT_DSP_B:
++ iface |= 0x0013;
++ break;
++ default:
++ return -EINVAL;
++ }
++
++ /* clock inversion */
++ switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
++ case SND_SOC_DAIFMT_NB_NF:
++ break;
++ case SND_SOC_DAIFMT_IB_IF:
++ iface |= 0x0090;
++ break;
++ case SND_SOC_DAIFMT_IB_NF:
++ iface |= 0x0080;
++ break;
++ case SND_SOC_DAIFMT_NB_IF:
++ iface |= 0x0010;
++ break;
++ default:
++ return -EINVAL;
++ }
++
++ /* set iface */
++ //sl90dsp_write(codec, SL90DSP_IFACE, iface);
++ return 0;
++}
++
++static int sl90dsp_set_bias_level(struct snd_soc_codec *codec,
++ enum snd_soc_bias_level level)
++{
++ //u16 reg = sl90dsp_read_reg_cache(codec, SL90DSP_PWR) & 0xff7f;
++
++ switch (level) {
++ case SND_SOC_BIAS_ON:
++ /* vref/mid, osc on, dac unmute */
++ //sl90dsp_write(codec, SL90DSP_PWR, reg);
++ break;
++ case SND_SOC_BIAS_PREPARE:
++ break;
++ case SND_SOC_BIAS_STANDBY:
++ /* everything off except vref/vmid, */
++ //sl90dsp_write(codec, SL90DSP_PWR, reg | 0x0040);
++ break;
++ case SND_SOC_BIAS_OFF:
++ /* everything off, dac mute, inactive */
++ //sl90dsp_write(codec, SL90DSP_ACTIVE, 0x0);
++ //sl90dsp_write(codec, SL90DSP_PWR, 0xffff);
++ break;
++ }
++ codec->bias_level = level;
++ return 0;
++}
++
++#define SL90DSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
++ SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
++ SNDRV_PCM_RATE_44100)
++
++#define SL90DSP_FORMATS (SNDRV_PCM_FMTBIT_S16_LE )
++
++struct snd_soc_dai sl90dsp_dai = {
++ .name = "SL90DSP",
++ .playback = {
++ .stream_name = "Playback",
++ .channels_min = 1,
++ .channels_max = 2,
++ .rates = SL90DSP_RATES,
++ .formats = SL90DSP_FORMATS,},
++ .capture = {
++ .stream_name = "Capture",
++ .channels_min = 1,
++ .channels_max = 2,
++ .rates = SL90DSP_RATES,
++ .formats = SL90DSP_FORMATS,},
++ .ops = {
++ .prepare = sl90dsp_pcm_prepare,
++ .hw_params = sl90dsp_hw_params,
++ .shutdown = sl90dsp_shutdown,
++ .digital_mute = sl90dsp_mute,
++ .set_sysclk = sl90dsp_set_dai_sysclk,
++ .set_fmt = sl90dsp_set_dai_fmt,
++ }
++};
++EXPORT_SYMBOL_GPL(sl90dsp_dai);
++
++static int sl90dsp_suspend(struct platform_device *pdev, pm_message_t state)
++{
++ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
++ struct snd_soc_codec *codec = socdev->codec;
++
++ //sl90dsp_write(codec, SL90DSP_ACTIVE, 0x0);
++ sl90dsp_set_bias_level(codec, SND_SOC_BIAS_OFF);
++ return 0;
++}
++
++static int sl90dsp_resume(struct platform_device *pdev)
++{
++ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
++ struct snd_soc_codec *codec = socdev->codec;
++ int i;
++ u8 data[2];
++ u16 *cache = codec->reg_cache;
++
++ /* Sync reg_cache with the hardware */
++ for (i = 0; i < ARRAY_SIZE(sl90dsp_reg); i++) {
++ data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
++ data[1] = cache[i] & 0x00ff;
++ codec->hw_write(codec->control_data, data, 2);
++ }
++ sl90dsp_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
++ sl90dsp_set_bias_level(codec, codec->suspend_bias_level);
++ return 0;
++}
++
++/*
++ * initialise the SL90DSP driver
++ * register the mixer and dsp interfaces with the kernel
++ */
++static int sl90dsp_init(struct snd_soc_device *socdev)
++{
++ struct snd_soc_codec *codec = socdev->codec;
++ int reg, ret = 0;
++
++ codec->name = "SL90DSP";
++ codec->owner = THIS_MODULE;
++ codec->read = sl90dsp_read_reg_cache;
++ codec->write = sl90dsp_write;
++ codec->set_bias_level = sl90dsp_set_bias_level;
++ codec->dai = &sl90dsp_dai;
++ codec->num_dai = 1;
++ codec->reg_cache_size = ARRAY_SIZE(sl90dsp_reg);
++ codec->reg_cache = kmemdup(sl90dsp_reg, sizeof(sl90dsp_reg), GFP_KERNEL);
++ if (codec->reg_cache == NULL)
++ return -ENOMEM;
++
++ //sl90dsp_reset(codec);
++
++ /* register pcms */
++ ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
++ if (ret < 0) {
++ printk(KERN_ERR "sl90dsp: failed to create pcms\n");
++ goto pcm_err;
++ }
++
++ /* power on device */
++ sl90dsp_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
++
++ sl90dsp_add_controls(codec);
++ sl90dsp_add_widgets(codec);
++ ret = snd_soc_init_card(socdev);
++ if (ret < 0) {
++ printk(KERN_ERR "sl90dsp: failed to register card\n");
++ goto card_err;
++ }
++
++ return ret;
++
++card_err:
++ snd_soc_free_pcms(socdev);
++ snd_soc_dapm_free(socdev);
++pcm_err:
++ kfree(codec->reg_cache);
++ return ret;
++}
++
++static struct snd_soc_device *sl90dsp_socdev;
++
++#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
++
++static int sl90dsp_i2c_probe(struct i2c_client *i2c,
++ const struct i2c_device_id *id)
++{
++ struct snd_soc_device *socdev = sl90dsp_socdev;
++ struct snd_soc_codec *codec = socdev->codec;
++ int ret;
++
++ i2c_set_clientdata(i2c, codec);
++ codec->control_data = i2c;
++
++ ret = sl90dsp_init(socdev);
++ if (ret < 0)
++ pr_err("failed to initialise SL90DSP I2C\n");
++
++ return ret;
++}
++
++static int sl90dsp_i2c_remove(struct i2c_client *client)
++{
++ struct snd_soc_codec *codec = i2c_get_clientdata(client);
++ kfree(codec->reg_cache);
++ return 0;
++}
++
++static const struct i2c_device_id sl90dsp_i2c_id[] = {
++ { "sl90dsp", 0 },
++ { }
++};
++MODULE_DEVICE_TABLE(i2c, sl90dsp_i2c_id);
++
++static struct i2c_driver sl90dsp_i2c_driver = {
++ .driver = {
++ .name = "SL90DSP I2C Codec",
++ .owner = THIS_MODULE,
++ },
++ .probe = sl90dsp_i2c_probe,
++ .remove = sl90dsp_i2c_remove,
++ .id_table = sl90dsp_i2c_id,
++};
++
++static int sl90dsp_add_i2c_device(struct platform_device *pdev,
++ const struct sl90dsp_setup_data *setup)
++{
++ struct i2c_board_info info;
++ struct i2c_adapter *adapter;
++ struct i2c_client *client;
++ int ret;
++
++ ret = i2c_add_driver(&sl90dsp_i2c_driver);
++ if (ret != 0) {
++ dev_err(&pdev->dev, "can't add i2c driver\n");
++ return ret;
++ }
++
++ memset(&info, 0, sizeof(struct i2c_board_info));
++ info.addr = setup->i2c_address;
++ strlcpy(info.type, "sl90dsp", I2C_NAME_SIZE);
++
++ adapter = i2c_get_adapter(setup->i2c_bus);
++ if (!adapter) {
++ dev_err(&pdev->dev, "can't get i2c adapter %d\n",
++ setup->i2c_bus);
++ goto err_driver;
++ }
++
++ client = i2c_new_device(adapter, &info);
++ i2c_put_adapter(adapter);
++ if (!client) {
++ dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
++ (unsigned int)info.addr);
++ goto err_driver;
++ }
++
++ return 0;
++
++err_driver:
++ i2c_del_driver(&sl90dsp_i2c_driver);
++ return -ENODEV;
++}
++#endif
++
++static int sl90dsp_probe(struct platform_device *pdev)
++{
++ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
++ struct sl90dsp_setup_data *setup;
++ struct snd_soc_codec *codec;
++ struct sl90dsp_priv *sl90dsp;
++ int ret = 0;
++
++ pr_info("SL90DSP Audio Codec %s", SL90DSP_VERSION);
++
++ setup = socdev->codec_data;
++ codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
++ if (codec == NULL)
++ return -ENOMEM;
++
++ sl90dsp = kzalloc(sizeof(struct sl90dsp_priv), GFP_KERNEL);
++ if (sl90dsp == NULL) {
++ kfree(codec);
++ return -ENOMEM;
++ }
++
++ codec->private_data = sl90dsp;
++ socdev->codec = codec;
++ mutex_init(&codec->mutex);
++ INIT_LIST_HEAD(&codec->dapm_widgets);
++ INIT_LIST_HEAD(&codec->dapm_paths);
++
++ sl90dsp_socdev = socdev;
++
++ ret=0;
++#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
++ ret = -ENODEV;
++ if (setup->i2c_address) {
++ codec->hw_write = (hw_write_t)i2c_master_send;
++ ret = sl90dsp_add_i2c_device(pdev, setup);
++ }
++#endif
++
++ if (ret != 0) {
++ kfree(codec->private_data);
++ kfree(codec);
++ }
++ return ret;
++}
++
++/* power down chip */
++static int sl90dsp_remove(struct platform_device *pdev)
++{
++ struct snd_soc_device *socdev = platform_get_drvdata(pdev);
++ struct snd_soc_codec *codec = socdev->codec;
++
++ if (codec->control_data)
++ sl90dsp_set_bias_level(codec, SND_SOC_BIAS_OFF);
++
++ snd_soc_free_pcms(socdev);
++ snd_soc_dapm_free(socdev);
++#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
++ i2c_unregister_device(codec->control_data);
++ i2c_del_driver(&sl90dsp_i2c_driver);
++#endif
++ kfree(codec->private_data);
++ kfree(codec);
++
++ return 0;
++}
++
++struct snd_soc_codec_device soc_codec_dev_sl90dsp = {
++ .probe = sl90dsp_probe,
++ .remove = sl90dsp_remove,
++ .suspend = sl90dsp_suspend,
++ .resume = sl90dsp_resume,
++};
++EXPORT_SYMBOL_GPL(soc_codec_dev_sl90dsp);
++
++static int __init sl90dsp_modinit(void)
++{
++ return snd_soc_register_dai(&sl90dsp_dai);
++}
++module_init(sl90dsp_modinit);
++
++static void __exit sl90dsp_exit(void)
++{
++ snd_soc_unregister_dai(&sl90dsp_dai);
++}
++module_exit(sl90dsp_exit);
++
++MODULE_DESCRIPTION("ASoC SL90DSP driver");
++MODULE_AUTHOR("Chris Jones");
++MODULE_LICENSE("GPL");
+Index: linux-2.6.29.1/sound/soc/codecs/sl90dsp.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.29.1/sound/soc/codecs/sl90dsp.h 2009-08-03 19:13:36.000000000 +0100
+@@ -0,0 +1,37 @@
++/*
++ * sl90dsp.h -- SL90 DSP Soc Audio driver
++ *
++ * Copyright 2005 Openedhand Ltd.
++ * 2009 Martin-Jones Technology Ltd
++ *
++ * Author: Richard Purdie <richard@openedhand.com>
++ * Chris Jones <chris@martin-jones.com>
++ * Based on wm8731.h
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#ifndef _SL90DSP_H
++#define _Sl90DSP_H
++
++/* SL90DSP register space */
++
++/* none yet */
++#define SL90DSP_MISCCONTROL 0x00
++#define SL90DSP_BALLOONVOLUME 0x01
++#define SL90DSP_GSMVOLUME 0x02
++#define SL90DSP_EXTVOLUME 0x03
++#define SL90DSP_CACHEREGNUM 4
++
++
++struct sl90dsp_setup_data {
++ int i2c_bus;
++ unsigned short i2c_address;
++};
++
++extern struct snd_soc_dai sl90dsp_dai;
++extern struct snd_soc_codec_device soc_codec_dev_sl90dsp;
++
++#endif
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-lmr5428.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-lmr5428.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-lmr5428.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,1043 @@
+Index: linux-2.6.29.1/drivers/char/charset.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.29.1/drivers/char/charset.h 2009-09-03 07:40:25.000000000 +0100
+@@ -0,0 +1,98 @@
++unsigned char charset[]={\
++ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, /* 0x20 ' ' */ \
++ 0x00,0x00,0x5f,0x00,0x00,0x00,0x00,0x00, /* 0x21 '!' */ \
++ 0x00,0x07,0x00,0x07,0x00,0x00,0x00,0x00, /* 0x22 '"' */ \
++ 0x14,0x7f,0x14,0x7f,0x14,0x00,0x00,0x00, /* 0x23 '#' */ \
++ 0x26,0x49,0x7f,0x49,0x32,0x00,0x00,0x00, /* 0x24 '$' */ \
++ 0x23,0x13,0x08,0x64,0x62,0x00,0x00,0x00, /* 0x25 '%' */ \
++ 0x36,0x49,0x56,0x20,0x58,0x00,0x00,0x00, /* 0x26 '&' */ \
++ 0x00,0x00,0x07,0x00,0x00,0x00,0x00,0x00, /* 0x27 ''' */ \
++ 0x00,0x1c,0x22,0x41,0x00,0x00,0x00,0x00, /* 0x28 '(' */ \
++ 0x00,0x41,0x22,0x1c,0x00,0x00,0x00,0x00, /* 0x29 ')' */ \
++ 0x22,0x14,0x7f,0x14,0x22,0x00,0x00,0x00, /* 0x2a '*' */ \
++ 0x08,0x08,0x3e,0x08,0x08,0x00,0x00,0x00, /* 0x2b '+' */ \
++ 0x00,0x80,0x60,0x00,0x00,0x00,0x00,0x00, /* 0x2c ',' */ \
++ 0x08,0x08,0x08,0x08,0x08,0x00,0x00,0x00, /* 0x2d '-' */ \
++ 0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00, /* 0x2e '.' */ \
++ 0x20,0x10,0x08,0x04,0x02,0x00,0x00,0x00, /* 0x2f '/' */ \
++ 0x1c,0x22,0x41,0x22,0x1c,0x00,0x00,0x00, /* 0x30 '0' */ \
++ 0x00,0x42,0x7f,0x40,0x00,0x00,0x00,0x00, /* 0x31 '1' */ \
++ 0x62,0x51,0x49,0x49,0x46,0x00,0x00,0x00, /* 0x32 '2' */ \
++ 0x21,0x41,0x49,0x4d,0x33,0x00,0x00,0x00, /* 0x33 '3' */ \
++ 0x18,0x14,0x12,0x7f,0x10,0x00,0x00,0x00, /* 0x34 '4' */ \
++ 0x27,0x45,0x45,0x45,0x39,0x00,0x00,0x00, /* 0x35 '5' */ \
++ 0x3c,0x4a,0x49,0x49,0x30,0x00,0x00,0x00, /* 0x36 '6' */ \
++ 0x01,0x71,0x09,0x05,0x03,0x00,0x00,0x00, /* 0x37 '7' */ \
++ 0x36,0x49,0x49,0x49,0x36,0x00,0x00,0x00, /* 0x38 '8' */ \
++ 0x06,0x49,0x49,0x29,0x1e,0x00,0x00,0x00, /* 0x39 '9' */ \
++ 0x00,0x00,0x44,0x00,0x00,0x00,0x00,0x00, /* 0x3a ':' */ \
++ 0x00,0x80,0x64,0x00,0x00,0x00,0x00,0x00, /* 0x3b ';' */ \
++ 0x08,0x14,0x22,0x41,0x00,0x00,0x00,0x00, /* 0x3c '<' */ \
++ 0x14,0x14,0x14,0x14,0x14,0x00,0x00,0x00, /* 0x3d '=' */ \
++ 0x00,0x41,0x22,0x14,0x08,0x00,0x00,0x00, /* 0x3e '>' */ \
++ 0x02,0x01,0x59,0x05,0x02,0x00,0x00,0x00, /* 0x3f '?' */ \
++ 0x3e,0x41,0x5d,0x55,0x1e,0x00,0x00,0x00, /* 0x40 '@' */ \
++ 0x7c,0x12,0x11,0x12,0x7c,0x00,0x00,0x00, /* 0x41 'A' */ \
++ 0x7f,0x49,0x49,0x49,0x36,0x00,0x00,0x00, /* 0x42 'B' */ \
++ 0x3e,0x41,0x41,0x41,0x22,0x00,0x00,0x00, /* 0x43 'C' */ \
++ 0x7f,0x41,0x41,0x41,0x3e,0x00,0x00,0x00, /* 0x44 'D' */ \
++ 0x7f,0x49,0x49,0x49,0x41,0x00,0x00,0x00, /* 0x45 'E' */ \
++ 0x7f,0x09,0x09,0x09,0x01,0x00,0x00,0x00, /* 0x46 'F' */ \
++ 0x3e,0x41,0x41,0x51,0x72,0x00,0x00,0x00, /* 0x47 'G' */ \
++ 0x7f,0x08,0x08,0x08,0x7f,0x00,0x00,0x00, /* 0x48 'H' */ \
++ 0x00,0x41,0x7f,0x41,0x00,0x00,0x00,0x00, /* 0x49 'I' */ \
++ 0x20,0x40,0x40,0x40,0x3f,0x00,0x00,0x00, /* 0x4a 'J' */ \
++ 0x7f,0x08,0x14,0x22,0x41,0x00,0x00,0x00, /* 0x4b 'K' */ \
++ 0x7f,0x40,0x40,0x40,0x40,0x00,0x00,0x00, /* 0x4c 'L' */ \
++ 0x7f,0x02,0x0c,0x02,0x7f,0x00,0x00,0x00, /* 0x4d 'M' */ \
++ 0x7f,0x04,0x08,0x10,0x7f,0x00,0x00,0x00, /* 0x4e 'N' */ \
++ 0x3e,0x41,0x41,0x41,0x3e,0x00,0x00,0x00, /* 0x4f 'O' */ \
++ 0x7f,0x09,0x09,0x09,0x06,0x00,0x00,0x00, /* 0x50 'P' */ \
++ 0x3e,0x41,0x51,0x21,0x5e,0x00,0x00,0x00, /* 0x51 'Q' */ \
++ 0x7f,0x09,0x19,0x29,0x46,0x00,0x00,0x00, /* 0x52 'R' */ \
++ 0x26,0x49,0x49,0x49,0x32,0x00,0x00,0x00, /* 0x53 'S' */ \
++ 0x01,0x01,0x7f,0x01,0x01,0x00,0x00,0x00, /* 0x54 'T' */ \
++ 0x3f,0x40,0x40,0x40,0x3f,0x00,0x00,0x00, /* 0x55 'U' */ \
++ 0x07,0x18,0x60,0x18,0x07,0x00,0x00,0x00, /* 0x56 'V' */ \
++ 0x3f,0x40,0x38,0x40,0x3f,0x00,0x00,0x00, /* 0x57 'W' */ \
++ 0x63,0x14,0x08,0x14,0x63,0x00,0x00,0x00, /* 0x58 'X' */ \
++ 0x03,0x04,0x78,0x04,0x03,0x00,0x00,0x00, /* 0x59 'Y' */ \
++ 0x61,0x51,0x49,0x45,0x43,0x00,0x00,0x00, /* 0x5a 'Z' */ \
++ 0x00,0x7f,0x41,0x41,0x00,0x00,0x00,0x00, /* 0x5b '[' */ \
++ 0x15,0x16,0x7c,0x16,0x15,0x00,0x00,0x00, /* 0x5c '\' */ \
++ 0x00,0x41,0x41,0x7f,0x00,0x00,0x00,0x00, /* 0x5d ']' */ \
++ 0x04,0x02,0x01,0x02,0x04,0x00,0x00,0x00, /* 0x5e '^' */ \
++ 0x40,0x40,0x40,0x40,0x40,0x00,0x00,0x00, /* 0x5f '_' */ \
++ 0x48,0x7e,0x49,0x41,0x42,0x00,0x00,0x00, /* 0x60 pound sign, should be backquote normally */ \
++ 0x20,0x54,0x54,0x54,0x78,0x00,0x00,0x00, /* 0x61 'a' */ \
++ 0x7f,0x44,0x44,0x44,0x38,0x00,0x00,0x00, /* 0x62 'b' */ \
++ 0x38,0x44,0x44,0x44,0x44,0x00,0x00,0x00, /* 0x63 'c' */ \
++ 0x38,0x44,0x44,0x44,0x7f,0x00,0x00,0x00, /* 0x64 'd' */ \
++ 0x38,0x54,0x54,0x54,0x18,0x00,0x00,0x00, /* 0x65 'e' */ \
++ 0x00,0x08,0x7e,0x09,0x00,0x00,0x00,0x00, /* 0x66 'f' */ \
++ 0x18,0xa4,0xa4,0xa4,0x7c,0x00,0x00,0x00, /* 0x67 'g' */ \
++ 0x7f,0x04,0x04,0x04,0x78,0x00,0x00,0x00, /* 0x68 'h' */ \
++ 0x00,0x44,0x7d,0x40,0x00,0x00,0x00,0x00, /* 0x69 'i' */ \
++ 0x00,0x80,0x7d,0x00,0x00,0x00,0x00,0x00, /* 0x6a 'j' */ \
++ 0x00,0x7f,0x10,0x28,0x44,0x00,0x00,0x00, /* 0x6b 'k' */ \
++ 0x00,0x41,0x7f,0x40,0x00,0x00,0x00,0x00, /* 0x6c 'l' */ \
++ 0x7c,0x04,0x78,0x04,0x78,0x00,0x00,0x00, /* 0x6d 'm' */ \
++ 0x7c,0x04,0x04,0x04,0x78,0x00,0x00,0x00, /* 0x6e 'n' */ \
++ 0x38,0x44,0x44,0x44,0x38,0x00,0x00,0x00, /* 0x6f 'o' */ \
++ 0xfc,0x24,0x24,0x24,0x18,0x00,0x00,0x00, /* 0x70 'p' */ \
++ 0x18,0x24,0x24,0x24,0xfc,0x00,0x00,0x00, /* 0x71 'q' */ \
++ 0x00,0x7c,0x08,0x04,0x04,0x00,0x00,0x00, /* 0x72 'r' */ \
++ 0x48,0x54,0x54,0x54,0x24,0x00,0x00,0x00, /* 0x73 's' */ \
++ 0x00,0x04,0x3f,0x44,0x00,0x00,0x00,0x00, /* 0x74 't' */ \
++ 0x3c,0x40,0x40,0x40,0x7c,0x00,0x00,0x00, /* 0x75 'u' */ \
++ 0x0c,0x30,0x40,0x30,0x0c,0x00,0x00,0x00, /* 0x76 'v' */ \
++ 0x3c,0x40,0x30,0x40,0x3c,0x00,0x00,0x00, /* 0x77 'w' */ \
++ 0x44,0x28,0x10,0x28,0x44,0x00,0x00,0x00, /* 0x78 'x' */ \
++ 0x1c,0xa0,0xa0,0xa0,0x7c,0x00,0x00,0x00, /* 0x79 'y' */ \
++ 0x44,0x64,0x54,0x4c,0x44,0x00,0x00,0x00, /* 0x7a 'z' */ \
++ 0x08,0x36,0x41,0x00,0x00,0x00,0x00,0x00, /* 0x7b '{' */ \
++ 0x00,0x00,0x77,0x00,0x00,0x00,0x00,0x00, /* 0x7c '|' */ \
++ 0x00,0x00,0x41,0x36,0x08,0x00,0x00,0x00, /* 0x7d '}' */ \
++ 0x02,0x01,0x02,0x04,0x02,0x00,0x00,0x00, /* 0x7e '~' */ \
++ 0x55,0x2a,0x55,0x2a,0x55,0x00,0x00,0x00, /* 0x7f '' */ \
++ };
+Index: linux-2.6.29.1/drivers/char/lmr5428.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.29.1/drivers/char/lmr5428.c 2009-09-07 14:22:47.000000000 +0100
+@@ -0,0 +1,906 @@
++/*
++ * linux/drivers/char/lmr5428.c
++ *
++ * file interface for Densitron LMR5428 display on the balloon samosa bus
++ * Copyright (c) Chris Jones, Martin-Jones Technology Ltd 2009
++ *
++*/
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/fs.h>
++#include <linux/uaccess.h>
++
++#if defined(CONFIG_MACH_BALLOON2)
++#include <mach/balloon2.h>
++#endif
++#if defined(CONFIG_MACH_BALLOON3)
++#include <mach/balloon3.h>
++#endif
++#include <asm/cacheflush.h>
++
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/proc_fs.h>
++#include <linux/vmalloc.h>
++#include <linux/platform_device.h>
++#include <linux/spinlock.h>
++#include "linux/cdev.h"
++#include <linux/samosa.h>
++#include "charset.h"
++
++#define LMR5428_DISPLAYS 1
++#define LMR5428_DATA_ADDRESS 0
++#define LMR5428_CMD_ADDRESS 1
++
++typedef enum {
++ DISPLAY_MODE_TEXT = 0,
++ DISPLAY_MODE_GRAPHICS = 1
++} Display_Block_Mode_t;
++
++typedef enum {
++ VDU_STATE_NORMAL=0,
++ VDU_STATE_SET_TEXT_SIZE=0x16,
++ VDU_STATE_CURSOR_POSITION_X=0x1f,
++ VDU_STATE_CURSOR_POSITION_Y=0x20
++} vdu_state_t;
++
++/* character device start number */
++static dev_t dev;
++static dev_t dev_raw;
++
++static spinlock_t lmr5428_lock;
++
++/* lmr5428 per device data */
++static struct lmr5428_dev {
++ unsigned int display;
++ struct cdev cdev;
++ struct cdev cdevraw;
++ unsigned int cursorx, cursory;
++ unsigned int textsizex, textsizey;
++ Display_Block_Mode_t displaymode;
++ vdu_state_t vdustate;
++} lmr5428[LMR5428_DISPLAYS];
++
++typedef enum {
++ VDU_NOP=0,
++ VDU_CURSOR_LEFT=0x08,
++ VDU_CURSOR_RIGHT=0x09,
++ VDU_CURSOR_DOWN=0x0a,
++ VDU_CURSOR_UP=0x0b,
++ VDU_CLEAR_SCREEN=0x0c,
++ VDU_CARRIAGE_RETURN=0x0d,
++ VDU_SET_TEXT_SIZE=0x16,
++ VDU_HOME=0x1e,
++ VDU_CURSOR_POSITION=0x1f
++} vdu_control_codes_t;
++
++/* ST7529 controller chip manipulation code */
++
++
++/* width, in triplets (3 pixels wide) */
++#define DISPLAY_WIDTH 80
++/* width in characters (6 pixels wide) */
++#define DISPLAY_WIDTH_CHARS 40
++/* height in characters (8 pixels tall) */
++#define DISPLAY_HEIGHT_CHARS 8
++// command table
++typedef enum {
++ ST7529_CMD_EXT_IN = 0x30,
++ ST7529_CMD_EXT_OUT= 0x31,
++
++// ext=0 (after ST7529_CMD_EXT_IN)
++ ST7529_CMD_DISON = 0xaf,
++ ST7529_CMD_DISOFF = 0xae,
++ ST7529_CMD_DISNOR = 0xa6,
++ ST7529_CMD_DISINV = 0xa7,
++ ST7529_CMD_COMSCN = 0xbb,
++ ST7529_CMD_DISCTRL= 0xca,
++ ST7529_CMD_SLPIN = 0x95,
++ ST7529_CMD_SLPOUT = 0x94,
++ ST7529_CMD_LASET = 0x75,
++ ST7529_CMD_CASET = 0x15,
++ ST7529_CMD_DATSDR = 0xbc,
++ ST7529_CMD_RAMWR = 0x5c,
++ ST7529_CMD_RAMRD = 0x5d,
++ ST7529_CMD_PTLIN = 0xa8,
++ ST7529_CMD_PTLOUT = 0xa9,
++ ST7529_CMD_RMWIN = 0xe0,
++ ST7529_CMD_RMWOUT = 0xee,
++ ST7529_CMD_ASCSET = 0xaa,
++ ST7529_CMD_SCSTART= 0xab,
++ ST7529_CMD_OSCON = 0xd1,
++ ST7529_CMD_OSCOFF = 0xd2,
++ ST7529_CMD_PWRCTRL= 0x20,
++ ST7529_CMD_VOLCTRL= 0x81,
++ ST7529_CMD_VOLUP = 0xd6,
++ ST7529_CMD_VOLDOWN= 0xd7,
++ ST7529_CMD_RESERVED= 0x82,
++ ST7529_CMD_EPSRRD1= 0x7c,
++ ST7529_CMD_EPSRRD2= 0x7d,
++ ST7529_CMD_NOP = 0x25,
++ ST7529_CMD_EPINT = 0x07,
++
++// ext=1 (after ST7529_CMD_EXT_OUT)
++ ST7529_CMD_GRAY1SET= 0x20,
++ ST7529_CMD_GRAY2SET= 0x21,
++ ST7529_CMD_ANASET = 0x32,
++ ST7529_CMD_SWINT = 0x34,
++ ST7529_CMD_EPCTIN = 0xcd,
++ ST7529_CMD_EPCOUT = 0xcc,
++ ST7529_CMD_EPMWR = 0xfc,
++ ST7529_CMD_EPMRD = 0xfd
++} ST7529_commands_t;
++
++
++typedef enum {
++ WHITE = 0x00,
++ BLACK = 0xf8
++} ST7529_colours_t;
++
++// masks for locations of adjacent pixels in pleft, pcentre and pright
++// for font smoothing
++#define PIX_DOWN 0x04
++#define PIX_CENTRE 0x02
++#define PIX_UP 0x01
++
++/* Display Size Parameters */
++#define HORIZONTAL_CHAR_SIZE 6
++#define VERTICAL_CHAR_SIZE 8
++#define DISPLAY_PIXEL_WIDTH 240
++#define DISPLAY_PIXEL_HEIGHT 64
++
++unsigned char st7529_grayscale[16]={0x00,0x03,0x06,0x09,0x0b,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x14,0x16,0x18,0x1b,0x1f};
++/* optimised for speed */
++static inline void write_cmd(unsigned char data)
++{ samosa_write8(LMR5428_CMD_ADDRESS,data); }
++static inline void write_data(unsigned char data)
++{ samosa_write8(LMR5428_DATA_ADDRESS,data); }
++static inline void write_data_block(unsigned char *data, unsigned int count)
++{ samosa_write_block8(LMR5428_DATA_ADDRESS,data,count); }
++static inline void write_data_repeat(unsigned char data, unsigned int count)
++{ samosa_write_repeat8(LMR5428_DATA_ADDRESS,data,count); }
++static inline unsigned char read_data()
++{ return samosa_read8(LMR5428_DATA_ADDRESS); }
++static inline unsigned char read_status()
++{ return samosa_read8(LMR5428_CMD_ADDRESS); }
++
++static void st7529_init(unsigned int display);
++static void st7529_block(unsigned int display, int startx, int starty, int endx, int endy, char colour);
++static int st7529_write_bars(unsigned int display);
++static void st7529_write_char(unsigned int display, unsigned char c, int xsize, int ysize, int pixelx, int pixely);
++static void st7529_write_chars(unsigned int display, unsigned char *s, int xsize, int ysize, int pixelx, int pixely);
++static void lmr5428_vdu(unsigned int display, unsigned char c);
++static void lmr5428_setup(unsigned int display);
++
++static void st7529_block(unsigned int display, int startx, int starty, int endx, int endy, char colour) {
++ int x,y;
++
++ write_cmd(ST7529_CMD_EXT_IN);
++ // set line address
++ write_cmd(ST7529_CMD_LASET);
++ // from starty to endy
++ write_data(starty);
++ write_data(endy-1);
++ // set column address
++ write_cmd(ST7529_CMD_CASET);
++ // from startx to endx
++ write_data(startx);
++ write_data(endx-1);
++ write_cmd(ST7529_CMD_RAMWR);
++ for(y=starty;y<endy;y++) {
++ for(x=startx;x<endx;x++) {
++ write_data(colour);
++ write_data(colour);
++ write_data(colour);
++ }
++ }
++}
++
++static int st7529_write_bars(unsigned int display) {
++ int x,y;
++
++ write_cmd(ST7529_CMD_EXT_IN);
++ // set line address
++ write_cmd(ST7529_CMD_LASET);
++ // from 0 to 63
++ write_data(0);
++ write_data(DISPLAY_PIXEL_HEIGHT-1);
++ // set column address
++ write_cmd(ST7529_CMD_CASET);
++ // from 0 to 79
++ write_data(0);
++ write_data(DISPLAY_WIDTH-1);
++ write_cmd(ST7529_CMD_RAMWR);
++ for(y=0;y<DISPLAY_PIXEL_HEIGHT;y++) {
++ for(x=0;x<DISPLAY_PIXEL_WIDTH;x++) {
++ write_data((x%0x20)<<3);
++ }
++ }
++}
++static void st7529_init(unsigned int display) {
++ int n;
++
++ // initialisation procedure from LMR5428 manual
++ // extended command mode off
++ write_cmd(ST7529_CMD_EXT_IN);
++ // exit sleep mode
++ write_cmd(ST7529_CMD_SLPOUT);
++ // oscillator on
++ write_cmd(ST7529_CMD_OSCON);
++ // power control, enable booster
++ write_cmd(ST7529_CMD_PWRCTRL);
++ write_data(0x08);
++ msleep(2);
++ // power control, regulator follower on
++ write_cmd(ST7529_CMD_PWRCTRL);
++ write_data(0x0b);
++ // set initial contrast // to 011010010 = 210 x 0.04v + 3.6V = 12.0V
++ // bottom 6 bits are in first byte
++ // top 3 bits are in second byte
++ write_cmd(ST7529_CMD_VOLCTRL);
++ write_data(18); // set Vop vlcd=12.0V
++ write_data(0x03);
++ // display control
++ write_cmd(ST7529_CMD_DISCTRL);
++ // divide clock by 2
++ write_data(0x04);
++ // duty cycle = 1/64
++ write_data(15);
++ // number of line cycles per frame = 1
++ write_data(0);
++ // COM scan direction
++ write_cmd(ST7529_CMD_COMSCN);
++ // from 0-79 and 80-156 in that order
++ write_data(0x00);
++ // data scan direction
++ write_cmd(ST7529_CMD_DATSDR);
++ // addresses scan in line direction, column addresses reversed, line address normal
++ write_data(0x02);
++ // segment arrangement
++ write_data(0x01);
++ // 32 gray-scale 3 byte 3 pixel mode (1 byte per pixel)
++ write_data(0x02);
++ // set line address
++ write_cmd(ST7529_CMD_LASET);
++ // from 0 to 63
++ write_data(0);
++ write_data(DISPLAY_PIXEL_HEIGHT-1);
++ // set column address
++ write_cmd(ST7529_CMD_CASET);
++ // from 0 to 79
++ write_data(0);
++ write_data(DISPLAY_WIDTH-1);
++ // enter extended command mode
++ write_cmd(ST7529_CMD_EXT_OUT);
++ // set grey level 1
++ write_cmd(ST7529_CMD_GRAY1SET);
++ for(n=0;n<16;n++) write_data(st7529_grayscale[n]);
++ // set grey level 2
++ write_cmd(ST7529_CMD_GRAY2SET);
++ for(n=0;n<16;n++) write_data(st7529_grayscale[n]);
++ // setup analogue circuit
++ write_cmd(ST7529_CMD_ANASET);
++ // oscillator freq =0 (default 12.7kHz)
++ write_data(0);
++ // booster efficiency 1 (default)
++ write_data(0x01);
++ // bias = 1/9
++ write_data(0x05);
++ // dithering off
++ write_cmd(ST7529_CMD_SWINT);
++
++ // back into normal command mode
++ write_cmd(ST7529_CMD_EXT_IN);
++ // switch display on
++ write_cmd(ST7529_CMD_DISON);
++ // and enter RAM write mode
++ write_cmd(ST7529_CMD_RAMWR);
++}
++
++
++static void st7529_write_char(unsigned int display, unsigned char c, int xsize, int ysize, int pixelx, int pixely) {
++ int column, columnwidth,pixelfillleft,pixelfillright,charwidth,charheight;
++ int columncount,x,y,ysub;
++ unsigned char pixeldata[3];
++
++ charwidth=xsize*6;
++ charheight=ysize*8;
++ // work out which column the top left pixel starts in
++ column=pixelx/3;
++ // and how many pixels either side of the character need to be ignored
++ pixelfillleft=pixelx%3;
++
++ columnwidth=(pixelfillleft+charwidth+2)/3;
++
++ pixelfillright=(columnwidth*3)-(pixelfillleft+charwidth);
++
++ // define box to draw the character in
++ write_cmd(ST7529_CMD_EXT_IN);
++ // set line address
++ write_cmd(ST7529_CMD_LASET);
++ // from pixely to pixely+charheight
++ write_data(pixely);
++ write_data(pixely+charheight-1);
++ // set column address
++ write_cmd(ST7529_CMD_CASET);
++ // from column to column+columnwidth
++ write_data(column);
++ write_data(column+columnwidth-1);
++ // we use read-modify-write mode for this
++ write_cmd(ST7529_CMD_RMWIN);
++
++ // now draw the character
++ for(y=0; y<8; y++) {
++ for(ysub=0;ysub<ysize;ysub++) {
++ // we have to go column-by-column because the LCD controller
++ // is daft and requires us to read all three pixels in a column
++ // before writing them back
++ for(columncount=0;columncount<columnwidth;columncount++) {
++ // first, read all the data out of the column
++ // dummy read. Why?
++ read_data();
++ for(x=0;x<3;x++)
++ pixeldata[x]=read_data();
++ // now modify the pixel data as required
++ for(x=0;x<3;x++) {
++ // work out where we are in the character 'cell'
++ int incell=x+(3*columncount)-pixelfillleft;
++ int charx=incell/xsize;
++ // and whereabouts in the character pixel we are (for font smoothing purposes)
++ int charxsub=((x+(3*columncount)-pixelfillleft)%xsize);
++ // are we past the empty pixels on the left?
++ // and within the character pixels?
++ if(incell>=0 && charx<7) {
++ // yes, figure out the value of this dot
++ // get the pixel data for this column
++ int charptr=((c-32)<<3);
++ char p=charset[charptr+charx];
++ unsigned int pleft, pright, pcurrent, pmask;
++ // get the correct bit. bit 0 is at the top, bit 7 at the bottom
++ pmask=1<<y;
++
++ // for size>1, do font smoothing but only for switched-off pixels
++ // and only when we're at the 'corner' of this character pixel
++ if(xsize>1 && ysize>1 && !(p&pmask)) {
++ // these 3 variables will contain columns of 3 pixels
++ // in bits 2..0
++ if(charx)
++ pleft=(((unsigned int)charset[charptr+charx-1])<<1)>>y;
++ else
++ pleft=0;
++ if(charx<6)
++ pright=(((unsigned int)charset[charptr+charx+1])<<1)>>y;
++ else
++ pright=0;
++ // and add the current column of pixels
++ pcurrent=((unsigned int)p<<1)>>y;
++ // do the surrounding pixels match any of the patterns we smooth?
++ // if so, force a pixel to be plotted here
++ // but only in the relevant 'corner' of the character pixel
++ if(charxsub==0 && ysub==0)
++ if((pleft & PIX_CENTRE) && (pcurrent & PIX_UP) && !(pleft & PIX_UP))
++ p=0xff;
++ if(charxsub==xsize-1 && ysub==0)
++ if((pright & PIX_CENTRE) && (pcurrent & PIX_UP) && !(pright & PIX_UP))
++ p=0xff;
++ if(charxsub==0 && ysub==ysize-1)
++ if((pleft & PIX_CENTRE) && (pcurrent & PIX_DOWN) && !(pleft & PIX_DOWN))
++ p=0xff;
++ if(charxsub==xsize-1 && ysub==ysize-1)
++ if((pright & PIX_CENTRE) && (pcurrent & PIX_DOWN) && !(pright & PIX_DOWN))
++ p=0xff;
++ }
++ // and set the pixel to be white or black
++ p&=pmask;
++ pixeldata[x]=(p?WHITE:BLACK);
++ } // if we're in the character pixels
++ } // x loop within display column
++ // now write the data back to the display
++ for(x=0;x<3;x++)
++ write_data(pixeldata[x]);
++ } // column loop
++ } // display y loop
++ } // character y loop
++ // leave read-modify-write mode
++ write_cmd(ST7529_CMD_RMWOUT);
++}
++
++static void st7529_write_chars(unsigned int display, unsigned char *s, int xsize, int ysize, int pixelx, int pixely) {
++ int n, x;
++
++ x=pixelx;
++ n=0;
++
++ while(s[n]) {
++ st7529_write_char(display,s[n],xsize,ysize, x,pixely);
++ x+=xsize*6;
++ n++;
++ }
++}
++
++static void lmr5428_vdu(unsigned int display, unsigned char c) {
++ struct lmr5428_dev *d=&(lmr5428[display]);
++
++ /* pr_info("%s state 0x%02x\n",__func__,d->vdustate); */
++ // check VDU state
++ switch(d->vdustate) {
++ case VDU_STATE_NORMAL:
++ // is this a standard character?
++ if(c>31 && c<128) {
++ int pixelx = d->cursorx * HORIZONTAL_CHAR_SIZE;
++ int pixely = d->cursory * VERTICAL_CHAR_SIZE;
++ // if so, just draw it at the current cursor position
++ st7529_write_char(display,c,d->textsizex,d->textsizey,pixelx,pixely);
++ // and update the cursor position
++ d->cursorx+=d->textsizex;
++ } else {
++ // handle control characters
++ switch(c) {
++ case VDU_CURSOR_LEFT:
++ if (d->cursorx>=d->textsizex)
++ d->cursorx-=d->textsizex;
++ else
++ d->cursorx=0;
++ break;
++ case VDU_CURSOR_RIGHT:
++ d->cursorx+=d->textsizex;
++ if(d->cursorx>=DISPLAY_WIDTH_CHARS)
++ d->cursorx=DISPLAY_WIDTH_CHARS-1;
++ break;
++ case VDU_CURSOR_DOWN:
++ d->cursory+=d->textsizey;
++ if(d->cursory>=DISPLAY_HEIGHT_CHARS)
++ d->cursory=DISPLAY_HEIGHT_CHARS-1;
++ break;
++ case VDU_CURSOR_UP:
++ if (d->cursory>=d->textsizey)
++ d->cursory-=d->textsizey;
++ else
++ d->cursory=0;
++ break;
++ case VDU_CLEAR_SCREEN:
++ d->cursorx=0;
++ d->cursory=0;
++ st7529_block(display,0,0,DISPLAY_WIDTH,DISPLAY_PIXEL_HEIGHT,BLACK);
++ break;
++ case VDU_CARRIAGE_RETURN:
++ d->cursorx=0;
++ break;
++ case VDU_SET_TEXT_SIZE:
++ d->vdustate=VDU_STATE_SET_TEXT_SIZE;
++ break;
++ case VDU_HOME:
++ d->cursorx=0;
++ d->cursory=0;
++ break;
++ case VDU_CURSOR_POSITION:
++ d->vdustate=VDU_STATE_CURSOR_POSITION_X;
++ break;
++ }
++ }
++ break;
++ case VDU_STATE_SET_TEXT_SIZE:
++ d->textsizex=(c&0xf0)>>4;
++ d->textsizey=c&0x0f;
++ if(d->textsizex==0) d->textsizex=1;
++ if(d->textsizey==0) d->textsizey=1;
++ d->vdustate=VDU_STATE_NORMAL;
++ break;
++ case VDU_STATE_CURSOR_POSITION_X:
++ if(c<0) c=0;
++ if(c>=DISPLAY_WIDTH_CHARS) c=DISPLAY_WIDTH_CHARS-1;
++ d->cursorx=c;
++ d->vdustate=VDU_STATE_CURSOR_POSITION_Y;
++ break;
++ case VDU_STATE_CURSOR_POSITION_Y:
++ if(c<0) c=0;
++ if(c>=DISPLAY_HEIGHT_CHARS) c=DISPLAY_HEIGHT_CHARS-1;
++ d->cursory=c;
++ d->vdustate=VDU_STATE_NORMAL;
++ break;
++ }
++}
++static ssize_t lmr5428_read(struct file *, char *, size_t, loff_t *);
++static ssize_t lmr5428_write(struct file *, const char *, size_t, loff_t *);
++static int lmr5428_open(struct inode *, struct file *);
++static int lmr5428_release(struct inode *, struct file *);
++static int lmr5428_ioctl(struct inode *, struct file *, unsigned int, unsigned long);
++static int lmr5428_mmap(struct file *, struct vm_area_struct *vm);
++
++static ssize_t lmr5428_read_raw(struct file *, char *, size_t, loff_t *);
++static ssize_t lmr5428_write_raw(struct file *, const char *, size_t, loff_t *);
++static int lmr5428_open_raw(struct inode *, struct file *);
++static int lmr5428_release_raw(struct inode *, struct file *);
++static int lmr5428_ioctl_raw(struct inode *, struct file *, unsigned int, unsigned long);
++static int lmr5428_mmap_raw(struct file *, struct vm_area_struct *vm);
++
++static struct file_operations lmr5428_fops = {
++ read: lmr5428_read,
++ write: lmr5428_write,
++ open: lmr5428_open,
++ release: lmr5428_release,
++ ioctl: lmr5428_ioctl,
++ mmap: lmr5428_mmap,
++};
++
++static struct file_operations lmr5428_fops_raw = {
++ read: lmr5428_read_raw,
++ write: lmr5428_write_raw,
++ open: lmr5428_open_raw,
++ release: lmr5428_release_raw,
++ ioctl: lmr5428_ioctl_raw,
++ mmap: lmr5428_mmap_raw,
++};
++
++/* proc interface */
++static ssize_t proc_read_lmr5428(struct file *file, char *buf,
++ size_t nbytes, loff_t *ppos);
++static ssize_t proc_write_lmr5428(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos);
++
++static struct file_operations proc_lmr5428_operations = {
++ read: proc_read_lmr5428,
++ write: proc_write_lmr5428
++};
++static struct proc_dir_entry *proc_lmr5428;
++#define PROC_LMR5428 "lmr5428"
++
++static void lmr5428_setup(unsigned int display)
++{
++ st7529_init(display);
++ st7529_block(display,0,0,DISPLAY_WIDTH,DISPLAY_PIXEL_HEIGHT,BLACK);
++}
++
++static int lmr5428_open(struct inode *inode, struct file *filp)
++{
++ struct lmr5428_dev *lmr5428_devp;
++
++ if (samosa_sm_present())
++ return -ENODEV;
++
++ lmr5428_devp = container_of(inode->i_cdev, struct lmr5428_dev, cdev);
++ filp->private_data = lmr5428_devp;
++
++ return 0;
++}
++
++static int lmr5428_release(struct inode *inode, struct file *filp)
++{
++ return 0;
++}
++
++static ssize_t lmr5428_read(struct file *filp, char *buf,
++ size_t size, loff_t *offp)
++{
++ /* we don't support reading at the moment */
++ return -EINVAL;
++}
++
++static ssize_t lmr5428_write(struct file *filp, const char *buf,
++ size_t size, loff_t *offp)
++{
++ struct lmr5428_dev *mp = (struct lmr5428_dev *)filp->private_data;
++ /* just pass all the data to the text-interpreting routine */
++ unsigned char c;
++ size_t org_size = size;
++ while (size) {
++ copy_from_user(&c, buf, sizeof(c));
++ buf += sizeof(c);
++ /* pr_info("%s: char 0x%x\n", __func__, c); */
++ lmr5428_vdu(mp->display, c);
++ size -= sizeof(unsigned char);
++ }
++ return org_size;
++}
++
++/* maybe this will be handy in due course */
++static int lmr5428_ioctl(struct inode *inode, struct file *flip,
++ unsigned int command, unsigned long arg)
++{
++ int err;
++ err = -EINVAL;
++ return err;
++}
++
++static int lmr5428_mmap(struct file *filp, struct vm_area_struct *vma)
++{
++ /*struct lmr5428_dev *mp = (struct lmr5428_dev *)filp->private_data;*/
++
++ return -EINVAL;
++}
++
++static int lmr5428_open_raw(struct inode *inode, struct file *filp)
++{
++ struct lmr5428_dev *lmr5428_devp;
++
++ if (samosa_sm_present())
++ return -ENODEV;
++
++ lmr5428_devp = container_of(inode->i_cdev, struct lmr5428_dev, cdevraw);
++ filp->private_data = lmr5428_devp;
++
++ /* set drawing rectangle to full screen */
++ write_cmd(ST7529_CMD_EXT_IN);
++ // set line address
++ write_cmd(ST7529_CMD_LASET);
++ // from 0 to 63
++ write_data(0);
++ write_data(DISPLAY_PIXEL_HEIGHT-1);
++ // set column address
++ write_cmd(ST7529_CMD_CASET);
++ // from 0 to 79
++ write_data(0);
++ write_data(DISPLAY_WIDTH-1);
++
++ /* and go into write mode */
++ write_cmd(ST7529_CMD_RAMWR);
++
++ return 0;
++}
++
++static int lmr5428_release_raw(struct inode *inode, struct file *filp)
++{
++ return 0;
++}
++
++static ssize_t lmr5428_read_raw(struct file *filp, char *buf,
++ size_t size, loff_t *offp)
++{
++ /* we don't support reading at the moment */
++ return -EINVAL;
++}
++
++static ssize_t lmr5428_write_raw(struct file *filp, const char *buf,
++ size_t size, loff_t *offp)
++{
++ struct lmr5428_dev *mp = (struct lmr5428_dev *)filp->private_data;
++ /* just pass all the data to the text-interpreting routine */
++ unsigned char c;
++ size_t org_size = size;
++ while (size) {
++ copy_from_user(&c, buf, sizeof(c));
++ buf += sizeof(c);
++ /* pr_info("%s: char 0x%x\n", __func__, c); */
++ write_data(c);
++ size -= sizeof(unsigned char);
++ }
++ return org_size;
++}
++
++/* maybe this will be handy in due course */
++static int lmr5428_ioctl_raw(struct inode *inode, struct file *flip,
++ unsigned int command, unsigned long arg)
++{
++ int err;
++ err = -EINVAL;
++ return err;
++}
++
++static int lmr5428_mmap_raw(struct file *filp, struct vm_area_struct *vma)
++{
++ /*struct lmr5428_dev *mp = (struct lmr5428_dev *)filp->private_data;*/
++
++ return -EINVAL;
++}
++
++static int proc_read_lmr5428(struct file *filp, char *buf,
++ size_t nbytes, loff_t *ppos)
++{
++ char outputbuf[512];
++ int count = 0;
++
++ /* all done in a single read */
++ if (*ppos > 0)
++ return 0;
++
++ count += sprintf(&outputbuf[count], "lmr5428: major dev = %d major dev raw = %d\n", MAJOR(dev),MAJOR(dev_raw));
++
++ if (count > nbytes) /* Assume output can be read at one time */
++ return -EINVAL;
++ if (copy_to_user(buf, outputbuf, count))
++ return -EFAULT;
++ *ppos += count;
++ return count;
++}
++
++static ssize_t proc_write_lmr5428(struct file *filp, const char *buffer,
++ size_t count, loff_t *ppos)
++{
++ /* struct lmr5428_dev *mp= (struct lmr5428_dev *)filp->private_data;
++ * if (strncmp(buff,"reset:",6)==0)
++ * newRegValue = simple_strtoul(buffer,&endp,0);
++ * a bold but simple claim is to have read it all
++ */
++ return count;
++}
++
++
++/* driver initialisation */
++
++static int __init lmr5428_probe(struct samosa_device *pdev)
++{
++#ifndef CONFIG_BALLOON2_BUILD_TCL_PIKEY2
++ /* if smart media present - cpld cannot be so declare invalid */
++ if (samosa_sm_present()) {
++ dev_info(&pdev->dev, "%s: samosa bus not present\n", __func__);
++ return -ENODEV;
++ }
++#endif
++
++
++ lmr5428_setup(pdev->id);
++
++#ifdef USE_GRAPHICS_TEST
++ lmr5428_bars(pdev->id);
++#endif
++
++ dev_info(&pdev->dev, "LMR5428 %d display support installed\n", pdev->id);
++
++ return 0;
++}
++
++static int __exit lmr5428_remove(struct samosa_device *dev)
++{
++ samosa_set_drvdata(dev, NULL);
++ return 0;
++}
++
++#ifdef CONFIG_PM
++static int lmr5428_suspend(struct samosa_device *dev, pm_message_t state)
++{
++ /*MinipugPowerSave(dev->id);*/
++ return 0;
++}
++
++static int lmr5428_resume(struct samosa_device *dev)
++{
++ /*MinipugExitPowerSave(dev->id);*/
++ return 0;
++}
++#else /* CONFIG_PM */
++#define lmr5428_suspend NULL
++#define lmr5428_resume NULL
++#endif /* CONFIG_PM */
++
++#define lmr5428_shutdown NULL
++
++/* driver definition */
++static struct samosa_driver lmr5428_driver = {
++ .probe = lmr5428_probe,
++ .shutdown = lmr5428_shutdown,
++ .remove = __exit_p(lmr5428_remove),
++ .suspend = lmr5428_suspend,
++ .resume = lmr5428_resume,
++ .driver = {
++ .owner = THIS_MODULE,
++ .name = "lmr5428",
++ },
++};
++
++/* bus device */
++static struct samosa_device *lmr5428_device[2];
++
++/* class object */
++static struct class *lmr5428_class;
++static struct class *lmr5428_raw_class;
++
++static int __init lmr5428_init(void)
++{
++ int i;
++ int ret;
++
++ /* general initialisation */
++ spin_lock_init(&lmr5428_lock);
++
++ /* register a range of device nodes */
++ ret = alloc_chrdev_region(&dev, 0, 1, "lmr5428");
++ if (ret)
++ goto error;
++ ret = alloc_chrdev_region(&dev_raw, 0, 1, "lmr5428raw");
++ if (ret)
++ goto error;
++
++ /* create the lmr5428 character devices */
++ for (i = 0; i < LMR5428_DISPLAYS; i++) {
++ lmr5428[i].display = i;
++ lmr5428[i].cursorx=0;
++ lmr5428[i].cursory=0;
++ lmr5428[i].textsizex=1;
++ lmr5428[i].textsizey=1;
++ lmr5428[i].displaymode=DISPLAY_MODE_TEXT;
++ lmr5428[i].vdustate=VDU_STATE_NORMAL;
++ /* initialise character device */
++ cdev_init(&lmr5428[i].cdev, &lmr5428_fops);
++ cdev_init(&lmr5428[i].cdevraw, &lmr5428_fops_raw);
++ /* claim ownership */
++ lmr5428[i].cdev.owner = THIS_MODULE;
++ lmr5428[i].cdevraw.owner = THIS_MODULE;
++ /* add character device */
++ ret = cdev_add(&lmr5428[i].cdev, dev + i, 1);
++ if (ret)
++ break;
++ ret = cdev_add(&lmr5428[i].cdevraw, dev_raw + i, 1);
++ if (ret)
++ break;
++ }
++ if (ret) {
++ goto error_region;
++ }
++
++ /* create the class and devices */
++ lmr5428_class = class_create(THIS_MODULE, "lmr5428");
++ lmr5428_raw_class = class_create(THIS_MODULE, "lmr5428raw");
++
++ for (i = 0; i < LMR5428_DISPLAYS; i++) {
++ if (!device_create(lmr5428_class, NULL, (dev + i), NULL, "lmr5428%d", i))
++ goto error_class_device;
++ if (!device_create(lmr5428_raw_class, NULL, (dev_raw + i), NULL, "lmr5428raw%d", i))
++ goto error_class_device;
++ /* register the device on a bus. */
++ lmr5428_device[i] = samosa_device_register_simple("lmr5428", i);
++ if (!lmr5428_device[i])
++ goto error_bus;
++ }
++
++ /* create proc access to displays */
++ proc_lmr5428 = create_proc_entry(PROC_LMR5428, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_lmr5428)
++ proc_lmr5428->proc_fops = &proc_lmr5428_operations;
++
++ /* register the driver */
++ return samosa_driver_register(&lmr5428_driver);
++
++error_bus:
++ for (i = 0; i < LMR5428_DISPLAYS; i++)
++ /* remove samosa device */
++ samosa_device_unregister(lmr5428_device[i]);
++error_class_device:
++ for (i = 0; i < LMR5428_DISPLAYS; i++) {
++ device_destroy(lmr5428_class, dev + i);
++ device_destroy(lmr5428_raw_class, dev_raw + i);
++ }
++error_region:
++ unregister_chrdev_region(dev, 1);
++ unregister_chrdev_region(dev_raw, 1);
++error:
++ return ret;
++}
++
++static void __exit lmr5428_exit(void)
++{
++ int i;
++
++ /* remove proc entry */
++ remove_proc_entry(PROC_LMR5428, NULL);
++
++ for (i = 0; i < LMR5428_DISPLAYS; i++) {
++ /* remove class device */
++ device_destroy(lmr5428_class, (dev + i));
++ device_destroy(lmr5428_raw_class, (dev_raw + i));
++
++ /* remove samosa device */
++ samosa_device_unregister(lmr5428_device[i]);
++
++ /* remove character device */
++ cdev_del(&lmr5428[i].cdev);
++ cdev_del(&lmr5428[i].cdevraw);
++ }
++ /* remove driver */
++ samosa_driver_unregister(&lmr5428_driver);
++
++ /* unregister region */
++ unregister_chrdev_region(dev, 1);
++ unregister_chrdev_region(dev_raw, 1);
++
++ /* remove class */
++ class_destroy(lmr5428_class);
++ class_destroy(lmr5428_raw_class);
++}
++
++module_init(lmr5428_init);
++module_exit(lmr5428_exit);
++
++MODULE_AUTHOR("Chris Jones <chris@martin-jones.com>");
++MODULE_DESCRIPTION("LMR5428 display interface via samosa bus on Balloon");
++MODULE_LICENSE("GPL");
+Index: linux-2.6.29.1/drivers/char/Kconfig
+===================================================================
+--- linux-2.6.29.1.orig/drivers/char/Kconfig 2009-09-03 07:40:24.000000000 +0100
++++ linux-2.6.29.1/drivers/char/Kconfig 2009-09-07 14:24:24.000000000 +0100
+@@ -666,6 +666,12 @@
+ help
+ Virtio console for use with lguest and other hypervisors.
+
++config LMR5428
++ tristate "LMR5428 Display"
++ depends on SAMOSA
++ default m
++ help
++ Densitron LMR5428 LCD display driven down Samosa bus (for Balloonboard).
+
+ config HVCS
+ tristate "IBM Hypervisor Virtual Console Server support"
+Index: linux-2.6.29.1/drivers/char/Makefile
+===================================================================
+--- linux-2.6.29.1.orig/drivers/char/Makefile 2009-09-03 07:40:24.000000000 +0100
++++ linux-2.6.29.1/drivers/char/Makefile 2009-09-07 14:24:24.000000000 +0100
+@@ -112,6 +112,7 @@
+ js-rtc-y = rtc.o
+
+ obj-$(CONFIG_SAMOSA) += samosa.o
++obj-$(CONFIG_LMR5428) += lmr5428.o
+
+ # Files generated that shall be removed upon make clean
+ clean-files := consolemap_deftbl.c defkeymap.c
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-megapug.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-megapug.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-megapug.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,1094 @@
+Index: linux-2.6.31/drivers/char/Kconfig
+===================================================================
+--- linux-2.6.31.orig/drivers/char/Kconfig 2010-01-04 21:07:10.000000000 +0000
++++ linux-2.6.31/drivers/char/Kconfig 2010-01-04 21:07:18.000000000 +0000
+@@ -693,6 +693,13 @@
+ help
+ Minipug will display an animated sequence till opened
+
++config MEGAPUG
++ tristate "Megapug LCD display"
++ depends on SAMOSA
++ default y
++ help
++ 544*288 LCD display driven down Samosa bus (for Balloonboard).
++
+ config HVCS
+ tristate "IBM Hypervisor Virtual Console Server support"
+ depends on PPC_PSERIES
+Index: linux-2.6.31/drivers/char/Makefile
+===================================================================
+--- linux-2.6.31.orig/drivers/char/Makefile 2010-01-04 21:07:10.000000000 +0000
++++ linux-2.6.31/drivers/char/Makefile 2010-01-04 21:07:18.000000000 +0000
+@@ -113,6 +113,7 @@
+
+ obj-$(CONFIG_SAMOSA) += samosa.o
+ obj-$(CONFIG_MINIPUG) += minipug.o
++obj-$(CONFIG_MEGAPUG) += megapug.o
+
+ # Files generated that shall be removed upon make clean
+ clean-files := consolemap_deftbl.c defkeymap.c
+Index: linux-2.6.31/drivers/char/megapug.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.31/drivers/char/megapug.c 2010-01-04 21:07:18.000000000 +0000
+@@ -0,0 +1,1052 @@
++/*
++ * linux/drivers/char/megapug.c
++ *
++ * file interface for megapug displays on the balloon samosa bus
++ * Copyright (c) N C Bane 2006 for Toby Churchill Ltd
++ *
++*/
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/fs.h>
++#include <linux/uaccess.h>
++
++#include <mach/balloon3.h>
++
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/proc_fs.h>
++#include <linux/vmalloc.h>
++#include <linux/platform_device.h>
++#include <linux/spinlock.h>
++#include "linux/cdev.h"
++#include "samosa.h"
++
++#define USE_GRAPHICS_TEST
++/* #define USE_GRAPHICS_TEST_PIXEL_TEST */
++
++/* character device start number */
++static dev_t dev;
++
++static spinlock_t megapug_lock;
++
++/* minipug per device data */
++static struct megapug_dev {
++ struct cdev cdev;
++ unsigned char *buffer;
++ unsigned int bpp;
++} megapug;
++
++/* total minipug on board ram */
++#define BUFFER_SIZE (160*1024)
++#define RAM_SIZE (160*1024)
++#define DISPLAY_BPP 4
++
++void megapug_update_graphics(unsigned char *data, unsigned int len, unsigned int offset)
++{
++ spin_lock(&megapug_lock);
++// MinipugSetCursorAddress(disp, display_state[disp].blocks[2].start + offset);
++// Write_Command(disp, COMMAND_MEMWRITE);
++// Write_ParameterBlock(disp, data, len);
++ spin_unlock(&megapug_lock);
++}
++EXPORT_SYMBOL(megapug_update_graphics);
++
++#if 0
++
++/* Minipug manipulation code */
++
++typedef unsigned char BYTE;
++typedef unsigned char BOOLEAN;
++#define TRUE 1
++#define FALSE 0
++
++/* width, in characters (8 bits wide) */
++#define DISPLAY_WIDTH 57
++/* height, in lines */
++#define DISPLAY_HEIGHT 80
++/* screen start addresses */
++#define DISPLAY_BPP 4
++#define TEXT_PAGE_START_ADDR 0x0000
++#define GRAPHICS_PAGE_0_START_ADDR (0x1000)
++#define GRAPHICS_PAGE_1_START_ADDR(bpp) (GRAPHICS_PAGE_0_START_ADDR+(DISPLAY_HEIGHT*DISPLAY_ADDRESSES_PER_LINE(bpp)))
++/* CGRAM start address */
++#define CGRAM_START_ADDR(bpp) (GRAPHICS_PAGE_1_START_ADDR(bpp)+(DISPLAY_HEIGHT*DISPLAY_ADDRESSES_PER_LINE(bpp)))
++
++typedef enum {
++ COMMAND_SYSTEM_SET = 0x40, /* system set, takes 8 bytes */
++ COMMAND_POWER_SAVE = 0x53, /* power save, takes 0 bytes */
++ COMMAND_DISP_ON = 0x59, /* display on, takes 1 byte */
++ COMMAND_DISP_OFF = 0x58, /* display off, takes 1 byte */
++ COMMAND_SCROLL = 0x44, /* set start address and size, takes 10 bytes */
++ COMMAND_CSRFORM = 0x5D, /* set cursor type, takes 2 bytes */
++ COMMAND_CSRDIR = 0x4C, /* set cursor direction, takes 0 bytes, but lower two bits are significant*/
++ COMMAND_OVLAY = 0x5B, /* set overlay format, takes 1 byte */
++ COMMAND_CGRAM_ADR = 0x5C, /* set start of character gen ram, takes 2 bytes */
++ COMMAND_HDOT_SCR = 0x5A, /* set horizontal scroll pos, takes 1 byte */
++ COMMAND_CSRW = 0x46, /* set cursor address, takes 2 bytes */
++ COMMAND_CSRR = 0x47, /* read cursor address, takes 2 bytes */
++ COMMAND_GRAYSCALE = 0x60, /* set grayscale depth bpp, takes 1 byte */
++ COMMAND_MEMWRITE = 0x42, /* write to memory */
++ COMMAND_MEMREAD = 0x43 /* read from memory */
++} MiniPug_LCD_Commands_t;
++
++typedef enum {
++ DISPLAY_BLOCK_OFF = 0,
++ DISPLAY_BLOCK_NO_FLASHING = 1,
++ DISPLAY_BLOCK_2HZ_FLASHING = 2,
++ DISPLAY_BLOCK_16HZ_FLASHING = 3
++} Display_Block_State_t;
++
++typedef enum {
++ DISPLAY_MODE_TEXT = 0,
++ DISPLAY_MODE_GRAPHICS = 1
++} Display_Block_Mode_t;
++
++typedef enum {
++ DISPLAY_LAYER_COMPOSITION_OR = 0,
++ DISPLAY_LAYER_COMPOSITION_EXOR = 1,
++ DISPLAY_LAYER_COMPOSIITON_AND = 3
++} Display_Layer_Composition_t;
++
++typedef struct {
++ Display_Block_State_t state;
++ Display_Block_Mode_t mode;
++ unsigned int start;
++ unsigned int size;
++} DisplayBlockState_t;
++
++typedef struct {
++ DisplayBlockState_t blocks[5];
++ Display_Block_State_t cursor;
++ unsigned char three_layers;
++ Display_Layer_Composition_t layer_composition;
++ unsigned int horizontal_address_range; /* Horizontal Size of virtual space from which the block is taken */
++ unsigned int character_bytes_per_row; /* Actual number of horizontal bytes per displayed line */
++ unsigned int total_character_bytes_per_row; /* Character bytes per row plus blanking bytes */
++} DisplayState_t;
++
++#define MAX_DISPLAYS 2
++static DisplayState_t display_state[] = {
++ {
++ {
++ {DISPLAY_BLOCK_NO_FLASHING, DISPLAY_MODE_GRAPHICS, 0, 0}, /* Block 1 */
++ {DISPLAY_BLOCK_OFF, 0, 0, 0}, /* Block 2 no mode only */
++ {DISPLAY_BLOCK_OFF, DISPLAY_MODE_GRAPHICS, 0, 0}, /* Block 3 */
++ {DISPLAY_BLOCK_OFF, DISPLAY_MODE_GRAPHICS, 0, 0} /* Block 4 */
++ },
++ DISPLAY_BLOCK_OFF, /* Cursor */
++ 0, /* three layers or two */
++ DISPLAY_LAYER_COMPOSITION_OR,
++ 0 /* Horizontal address range */
++ }, /* Display 1 */
++ {
++ {
++ {DISPLAY_BLOCK_OFF, DISPLAY_MODE_GRAPHICS, 0, 0}, /* Block 1 */
++ {DISPLAY_BLOCK_OFF, 0, 0, 0}, /* Block 2 no mode only */
++ {DISPLAY_BLOCK_OFF, DISPLAY_MODE_GRAPHICS, 0, 0}, /* Block 3 */
++ {DISPLAY_BLOCK_OFF, DISPLAY_MODE_GRAPHICS, 0, 0} /* Block 4 */
++ },
++ DISPLAY_BLOCK_NO_FLASHING, /* Cursor */
++ 0, /* three layers or two */
++ DISPLAY_LAYER_COMPOSITION_OR,
++ 0 /* Horizontal address range */
++ }
++ }; /* Display 2 */
++
++typedef enum { CURSOR_DIRECTION_RIGHT = 0,
++ CURSOR_DIRECTION_LEFT = 1,
++ CURSOR_DIRECTION_UP = 2,
++ CURSOR_DIRECTION_DOWN = 3
++} Cursor_Direction_t;
++
++typedef struct {
++ unsigned char height;
++ unsigned char width;
++ unsigned char block;
++ Cursor_Direction_t shift_direction;
++} Cursor_State_t;
++
++Cursor_State_t cursor_state = {8, 8, 1, CURSOR_DIRECTION_RIGHT};
++
++typedef struct {
++ unsigned int x_org;
++ unsigned int y_org;
++ unsigned int x_size;
++ unsigned int y_size;
++} Display_Region_t;
++
++/* Display Size Parameters */
++#define HORIZONTAL_CHAR_SIZE 8
++#define VERTICAL_CHAR_SIZE 8
++#define DISPLAY_PIXEL_WIDTH 453
++#define DISPLAY_PIXEL_HEIGHT 80
++#define RAM_SIZE 0x8000
++
++/* Memory Configuration Register */
++#define SCREEN_ORIGIN_COMPENSATION_SET (1 << 5)
++#define DEFAULT_SCREEN_SET_VALUE (1 << 4)
++#define SINGLE_PANEL_DRIVE 0
++#define DUAL_PANEL_DRIVE (1 << 3)
++#define CHAR_HEIGHT_8_BITS 0
++#define CHAR_HEIGHT_16_BITS (1 << 2)
++#define CGROM_SELECT 0
++#define CGRAM_SELECT 1
++
++/* Horizontal Character Size Register */
++#define AC_DRIVE_TWO_FRAMES (1 << 7)
++#define AC_DRIVE_16_LINES 0
++
++/* OVLAY Register bits */
++#define OVERLAY_TWO_LAYERS 0
++#define OVERLAY_THREE_LAYERS (1 << 4)
++#define SCREEN_BLOCK_3_GRAPHICS 0
++
++static unsigned char MinipugReady(int disp)
++{
++#ifdef USE_READY
++ return samosa_read8(CPLD_LCD_RO_SET) & (1 << (disp ? CPLD_LCD_RO_LCD1_nWAIT_BIT : CPLD_LCD_RO_LCD0_nWAIT_BIT));
++#else
++ return 1;
++#endif
++}
++
++static unsigned char minipug_ready(int display)
++{
++ unsigned char ret;
++ ret = (unsigned char) samosa_read8(CPLD_LCD_RO_SET) & (1 << (display ? CPLD_LCD_RO_LCD1_nWAIT_BIT : CPLD_LCD_RO_LCD0_nWAIT_BIT));
++ pr_debug("%s:returns %x\n", __func__, ret);
++ return ret;
++}
++
++/* optimised for speed */
++static inline void Write_ParameterBlock(unsigned int display, unsigned char *data, unsigned int count)
++ { samosa_write_block8((display ? CPLD_LCD1_DATA_SET : CPLD_LCD0_DATA_SET), data, count); }
++static inline void Write_Parameter(unsigned int display, unsigned char parameter)
++ { samosa_write8((display ? CPLD_LCD1_DATA_SET : CPLD_LCD0_DATA_SET), parameter); }
++static inline void Write_Command(unsigned int display, unsigned char command) { samosa_write8((display ? CPLD_LCD1_COMMAND_SET : CPLD_LCD0_COMMAND_SET), command); }
++
++static inline void MinipugSetCursorAddress(unsigned int display, unsigned int addr)
++{
++ Write_Command(display, COMMAND_CSRW);
++ Write_Parameter(display, (BYTE)(addr & 0xff));
++ Write_Parameter(display, (BYTE)((addr >> 8) & 0xff));
++}
++
++static int MinipugInitDisplay(unsigned int display);
++static void MinipugSetAddresses(unsigned int display,
++ unsigned int block1_addr, unsigned int block1_size,
++ unsigned int block2_addr, unsigned int block2_size,
++ unsigned int block3_addr,
++ unsigned int block4_addr);
++static void MinipugSystemSet(unsigned int display);
++static void MinipugPowerSave(unsigned int display);
++static void MinipugDisplayOn(unsigned int display);
++static void MinipugDisplayOff(unsigned int display);
++static void MinipugCursorDir(unsigned int display);
++static void MinipugScroll(unsigned int display);
++static void MinipugSetCursorFormat(unsigned int display);
++static void MinipugOverlay(unsigned int display);
++static void MinipugSetCharGenRamAddress(unsigned int display, unsigned int address);
++static void MinipugSetHorizontalScroll(unsigned int display, unsigned int offset);
++static unsigned short MinipugGetHorizontalScroll(unsigned int display);
++static unsigned short MinipugGetCursorAddress(unsigned int display);
++static void MinipugSetGrayscale(unsigned int display, unsigned int bits_per_pixel);
++static unsigned char MinipugGetGreyScale(unsigned int display);
++static void MinipugWriteMemoryByte(unsigned int display, BYTE value);
++static unsigned char MinipugReadMemoryByte(unsigned int display);
++static void MinipugWriteMemoryBlock(unsigned int display, int count, unsigned char b);
++static unsigned char Read_Parameter(unsigned int display);
++static void MinipugBlockFill(unsigned int display, unsigned int block, BYTE fill_value);
++static void MinipugClose(unsigned int display);
++static void MinipugWriteString(unsigned int display, char *string);
++static void MinipugGraphicTest(unsigned int display, unsigned int block);
++static void MinipugPixelFill(unsigned int display, unsigned int block, Display_Region_t *area, BYTE fill_value);
++static void MinipugSetByte(unsigned int display, unsigned int block, unsigned int x, unsigned int y, BYTE fill);
++static void MinipugTextTest(unsigned int display, unsigned int block);
++
++static BOOLEAN CheckDisplay(unsigned int display)
++{
++ if (display > MAX_DISPLAYS)
++ return FALSE;
++ else
++ return TRUE;
++}
++
++void minipug_update_graphics(unsigned int disp, unsigned char *data, unsigned int len, unsigned int offset)
++{
++ spin_lock(&minipug_lock);
++ MinipugSetCursorAddress(disp, display_state[disp].blocks[2].start + offset);
++ Write_Command(disp, COMMAND_MEMWRITE);
++ Write_ParameterBlock(disp, data, len);
++ spin_unlock(&minipug_lock);
++}
++EXPORT_SYMBOL(minipug_update_graphics);
++
++static void MinipugBlockFill(unsigned int display, unsigned int block, BYTE fill_value)
++{
++ int i, j;
++ unsigned char byte = 0;
++ unsigned char bits_per_pixel = minipug[display].bpp;
++
++ pr_debug("Block fill display %d with 0x%x\n", display, fill_value);
++ switch (bits_per_pixel) {
++ case 1:
++ if ((fill_value & 0x1) == 1)
++ byte = 0xff;
++ else
++ byte = 0;
++ break;
++ case 2:
++ fill_value = fill_value & 0x3;
++ byte = (BYTE)((fill_value << 6) | (fill_value << 4) |
++ (fill_value << 2) | (fill_value & 0xf));
++ break;
++ case 4:
++ byte = (BYTE)(((fill_value & 0xf) << 4) | (fill_value & 0xf));
++ break;
++ break;
++ }
++ MinipugWriteMemoryByte(display, fill_value);
++ for (i = 0; i < display_state[display].blocks[block].size; i++) {
++ for (j = 0; j < display_state[display].horizontal_address_range; j++) {
++ Write_Parameter(display, byte);
++ }
++ }
++}
++
++static void MinipugPixelFill(unsigned int display, unsigned int block, Display_Region_t *area, BYTE fill_value)
++{
++ int i, j;
++
++ for (i = 0; i < area->y_size; i++) {
++ for (j = 0; j < area->x_size; j++) {
++ MinipugSetByte(display, block, area->x_org + j, area->y_org + i, fill_value);
++ }
++ }
++}
++
++static void MinipugSetByte(unsigned int display, unsigned int block, unsigned int x, unsigned int y, BYTE fill)
++{
++ unsigned int byte_address, x_offset = 0;
++ unsigned char bits_per_pixel = minipug[display].bpp;
++ switch (bits_per_pixel) {
++ case 1:
++ x_offset = (x >> 3);
++ break;
++ case 2:
++ x_offset = (x >> 2);
++ break;
++ case 4:
++ x_offset = (x >> 1);
++ break;
++ }
++ byte_address = display_state[display].blocks[block].start
++ + (y * display_state[display].horizontal_address_range)
++ + x_offset;
++ MinipugSetCursorAddress(display, byte_address);
++ MinipugWriteMemoryByte(display, fill);
++}
++
++
++static void MinipugGraphicTest(unsigned int display, unsigned int block)
++{
++ int i;
++ Display_Region_t blob;
++
++#ifdef USE_GRAPHICS_TEST_PIXEL_TEST
++ pr_debug("%s: block start address is 0x%x\n", __func__,
++ display_state[display].blocks[block].start);
++ for (i = 0; i < 10; i++) {
++ MinipugSetByte(display, block, 0, i, 255);
++ MinipugSetByte(display, block, 8, i, 255);
++ }
++#else
++
++ MinipugSetCursorAddress(display, display_state[display].blocks[block].start);
++ MinipugWriteMemoryByte(display, 255);
++ for (i = 0; i < display_state[display].character_bytes_per_row-1; i++)
++ Write_Parameter(display, 255);
++ MinipugSetCursorAddress(display, display_state[display].blocks[block].start
++ + (display_state[display].horizontal_address_range)
++ * (display_state[display].blocks[block].size - 1));
++ MinipugWriteMemoryByte(display, 255);
++ for (i = 0; i < display_state[display].character_bytes_per_row-1; i++)
++ Write_Parameter(display, 255);
++ blob.x_org = 100;
++ blob.y_org = 30;
++ blob.x_size = 10;
++ blob.y_size = 10;
++ for (i = 0; i < 16; i++) {
++ MinipugPixelFill(display, block, &blob, i<<4 | i);
++ blob.x_org += 12;
++ }
++#endif
++}
++
++static void MinipugTextTest(unsigned int display, unsigned int block)
++{
++ unsigned char message[250];
++ int i;
++
++ for (i = 0; i < 9; i++) {
++ MinipugSetCursorAddress(display, display_state[display].blocks[block].start + (display_state[display].horizontal_address_range * i) + 20);
++ sprintf(message, "T C L");
++ MinipugWriteString(display, message);
++ mdelay(200);
++ sprintf(message, " ");
++ MinipugSetCursorAddress(display, display_state[display].blocks[block].start + (display_state[display].horizontal_address_range * i) + 20);
++ MinipugWriteString(display, message);
++ }
++ MinipugSetCursorAddress(display, display_state[display].blocks[block].start + (display_state[display].horizontal_address_range * 9) + 20);
++ sprintf(message, "T C L");
++ MinipugWriteString(display, message);
++}
++
++static int MinipugInitDisplay(unsigned int display)
++{
++ unsigned int graphic_block_size, text_block_size;
++ unsigned char bits_per_pixel = minipug[display].bpp;
++
++ if (!CheckDisplay(display))
++ return FALSE;
++ display_state[display].character_bytes_per_row = ((DISPLAY_PIXEL_WIDTH * bits_per_pixel)/8);
++ display_state[display].total_character_bytes_per_row = display_state[display].character_bytes_per_row + 2;
++ display_state[display].horizontal_address_range = display_state[display].total_character_bytes_per_row;
++ graphic_block_size = display_state[display].horizontal_address_range * DISPLAY_PIXEL_HEIGHT;
++ text_block_size = display_state[display].horizontal_address_range * 10;
++ pr_debug("Display #%d\n", display);
++ pr_debug("Graphic block size = 0x%x\n", graphic_block_size);
++ pr_debug("Text block size = 0x%x\n", text_block_size);
++ pr_debug("character_bytes_per_row = %d\n",
++ display_state[display].character_bytes_per_row);
++ pr_debug("total_character_bytes_per_row = %d\n",
++ display_state[display].total_character_bytes_per_row);
++ pr_debug("horizontal_address_range = %d\n",
++ display_state[display].horizontal_address_range);
++ display_state[display].blocks[1].start = 0x0000;
++ display_state[display].blocks[1].size = 80; /* 80 when graphics 10 when text? */
++ display_state[display].blocks[1].state = DISPLAY_BLOCK_NO_FLASHING;
++ display_state[display].blocks[1].mode = DISPLAY_MODE_TEXT;
++ display_state[display].blocks[2].start = text_block_size;
++ display_state[display].blocks[2].size = 80; /* 80 because its graphics */
++ display_state[display].blocks[2].state = DISPLAY_BLOCK_NO_FLASHING;
++ display_state[display].blocks[2].mode = 0;
++ display_state[display].blocks[3].start = text_block_size + graphic_block_size;
++ display_state[display].blocks[3].size = 0;
++ display_state[display].blocks[3].state = DISPLAY_BLOCK_OFF;
++ display_state[display].blocks[3].mode = DISPLAY_MODE_TEXT;
++ display_state[display].blocks[4].start = graphic_block_size + text_block_size + text_block_size;
++ display_state[display].blocks[4].size = 0;
++ display_state[display].blocks[4].state = DISPLAY_BLOCK_OFF;
++ display_state[display].blocks[4].mode = 0;
++
++ MinipugSystemSet(display);
++ MinipugScroll(display);
++ MinipugSetHorizontalScroll(display, 0);
++ MinipugOverlay(display);
++ MinipugDisplayOff(display);
++ MinipugSetCursorAddress(display, display_state[display].blocks[2].start);
++ MinipugBlockFill(display, 2, 0);
++ MinipugSetCursorAddress(display, display_state[display].blocks[1].start);
++ MinipugBlockFill(display, 1, 0x20);
++ MinipugDisplayOn(display);
++ MinipugSetGrayscale(display, bits_per_pixel);
++ MinipugSetCursorFormat(display);
++ return TRUE;
++}
++
++static void MinipugSetAddresses(unsigned int display,
++ unsigned int block1_addr, unsigned int block1_size,
++ unsigned int block2_addr, unsigned int block2_size,
++ unsigned int block3_addr,
++ unsigned int block4_addr)
++{
++ pr_debug("Setting block 1 start = 0x%x\n", block1_addr);
++ display_state[display].blocks[1].start = block1_addr;
++ pr_debug("Setting block 1 size = 0x%x\n", block1_size);
++ display_state[display].blocks[1].size = block1_size;
++ pr_debug("Setting block 2 start = 0x%x\n", block2_addr);
++ display_state[display].blocks[2].start = block2_addr;
++ pr_debug("Setting block 2 size = 0x%x\n", block2_size);
++ display_state[display].blocks[2].size = block2_size;
++ pr_debug("Setting block 3 start = 0x%x\n", block3_addr);
++ display_state[display].blocks[3].start = block3_addr;
++ pr_debug("Setting block 4 start = 0x%x\n", block4_addr);
++ display_state[display].blocks[4].start = block4_addr;
++}
++
++static void MinipugSystemSet(unsigned int display)
++{
++ unsigned char byte;
++
++ Write_Command(display, COMMAND_SYSTEM_SET);
++ byte = DEFAULT_SCREEN_SET_VALUE | SCREEN_ORIGIN_COMPENSATION_SET
++ | SINGLE_PANEL_DRIVE | CHAR_HEIGHT_8_BITS | CGROM_SELECT;
++ Write_Parameter(display, byte); /* P1 Memory configuration register (0x00) */
++ pr_debug("Register[0] = 0x%x\n", byte);
++ byte = AC_DRIVE_TWO_FRAMES | ((HORIZONTAL_CHAR_SIZE - 1) & 0x0f);
++ Write_Parameter(display, byte); /* P2 Horizontal Character size register (0x01) */
++ pr_debug("Register[1] = 0x%x\n", byte);
++ byte = (VERTICAL_CHAR_SIZE - 1) & 0xf;
++ Write_Parameter(display, byte); /* P3 Vertical Character Size Register (0x02) */
++ pr_debug("Register[2] = 0x%x\n", byte);
++ byte = (BYTE)((display_state[display].character_bytes_per_row & 0xff) - 1);
++ Write_Parameter(display, byte); /* P4 Character Bytes per Row Register (0x03) */
++ pr_debug("Register[3] = 0x%x\n", byte);
++ byte = (BYTE)(display_state[display].total_character_bytes_per_row & 0xff);
++ Write_Parameter(display, byte); /* Total Character Bytes per Row Register (0x04) */
++ pr_debug("Register[4] = 0x%x\n", byte);
++ byte = (DISPLAY_PIXEL_HEIGHT & 0xff);
++ Write_Parameter(display, byte); /* Frame Height Register (0x05) */
++ pr_debug("Register[5] = 0x%x\n", byte);
++ byte = (BYTE)(display_state[display].horizontal_address_range & 0xff);
++ Write_Parameter(display, byte); /* Horizontal Address Range Register (low) */
++ pr_debug("Register[6] = 0x%x\n", byte);
++ byte = (BYTE)((display_state[display].horizontal_address_range & 0xff00) >> 8);
++ Write_Parameter(display, byte); /* Horizontal Address Range Register (high) */
++ pr_debug("Register[7] = 0x%x\n", byte);
++}
++
++static void MinipugPowerSave(unsigned int display)
++{
++ Write_Command(display, COMMAND_POWER_SAVE);
++}
++
++static void MinipugExitPowerSave(unsigned int display)
++{
++ /* this is copied from the msp430 code minipug handler
++ * it is prefaced by "dunno why this convoluted sequence is
++ * necessary but ..."
++ * it could do with review
++ */
++ MinipugSystemSet(display);
++ while (!MinipugReady(display))
++ ;
++ mdelay(20);
++ MinipugSystemSet(display);
++ while (!MinipugReady(display))
++ ;
++ mdelay(20);
++ /* 2 dummy writes as specified by epson controller code */
++ MinipugDisplayOn(display);
++ MinipugDisplayOn(display);
++ MinipugSetGrayscale(display, minipug[display].bpp);
++}
++
++static void MinipugDisplayOn(unsigned int display)
++{
++ unsigned char byte;
++
++ Write_Command(display, COMMAND_DISP_ON);
++ byte = (display_state[display].blocks[3].state << 6) |
++ (display_state[display].blocks[2].state << 4) |
++ (display_state[display].blocks[1].state << 2) |
++ (display_state[display].cursor);
++ Write_Parameter(display, byte); /* Display Enable Register (0x09) */
++ pr_debug("Display On Register[0x9] = 0x%x\n", byte);
++}
++
++static void MinipugDisplayOff(unsigned int display)
++{
++ unsigned char byte;
++ Write_Command(display, COMMAND_DISP_OFF);
++ byte = (display_state[display].blocks[3].state << 6) |
++ (display_state[display].blocks[2].state << 4) |
++ (display_state[display].blocks[1].state << 2) |
++ (display_state[display].cursor);
++ Write_Parameter(display, byte); /* Display Enable Register (0x09) */
++ pr_debug("Display Off Register[0x9] = 0x%x\n", byte);
++}
++
++static void MinipugCursorDir(unsigned int display)
++{
++ Write_Command(display, (BYTE)(COMMAND_CSRDIR | (cursor_state.shift_direction & 3)));
++}
++
++static void MinipugScroll(unsigned int display)
++{
++ unsigned char byte;
++
++ Write_Command(display, COMMAND_SCROLL);
++ byte = (display_state[display].blocks[1].start & 0xff);
++ Write_Parameter(display, byte); /* Screen Block 1 Start Address Register (0x0b) */
++ pr_debug("Block 1 Start Register[0x0b] = 0x%x\n", byte);
++ byte = (display_state[display].blocks[1].start & 0xff00) >> 8;
++ Write_Parameter(display, byte); /* Screen Block 1 Start Address Register (0x0c) */
++ pr_debug("Block 1 Start Register[0x0c] = 0x%x\n", byte);
++ byte = display_state[display].blocks[1].size & 0xff;
++ Write_Parameter(display, byte); /* Screen Block 1 size Register (0x0d) */
++ pr_debug("Block 1 Size Register[0x0d] = 0x%x\n", byte);
++ byte = (display_state[display].blocks[2].start & 0xff);
++ Write_Parameter(display, byte); /* Screen Block 2 Start Address Register (0x0e) */
++ pr_debug("Block 2 Start Register[0x0e] = 0x%x\n", byte);
++ byte = (display_state[display].blocks[2].start & 0xff00) >> 8;
++ Write_Parameter(display, byte); /* Screen Block 2 Start Address Register (0x0f) */
++ pr_debug("Block 2 Start Register[0x0f] = 0x%x\n", byte);
++ byte = display_state[display].blocks[2].size & 0xff;
++ Write_Parameter(display, byte); /* Screen Block 2 size Register (0x10) */
++ pr_debug("Block 2 Size Register[0x10] = 0x%x\n", byte);
++ byte = (display_state[display].blocks[3].start & 0xff);
++ Write_Parameter(display, byte); /* Screen Block 3 Start Address Register (0x11) */
++ pr_debug("Block 3 Start Register[0x11] = 0x%x\n", byte);
++ byte = (display_state[display].blocks[3].start & 0xff00) >> 8;
++ Write_Parameter(display, byte); /* Screen Block 3 Start Address Register (0x12) */
++ pr_debug("Block 3 Start Register[0x12] = 0x%x\n", byte);
++ byte = (display_state[display].blocks[4].start & 0xff);
++ Write_Parameter(display, byte); /* Screen Block 4 Start Address Register (0x13) */
++ pr_debug("Block 4 Start Register[0x13] = 0x%x\n", byte);
++ byte = (display_state[display].blocks[4].start & 0xff00) >> 8;
++ Write_Parameter(display, byte); /* Screen Block 4 Start Address Register (0x14) */
++ pr_debug("Block 4 Start Register[0x14] = 0x%x\n", byte);
++}
++
++static void MinipugSetCursorFormat(unsigned int display)
++{
++ Write_Command(display, COMMAND_CSRFORM);
++ Write_Parameter(display, (BYTE)(cursor_state.width & 0x0f));
++ pr_debug("Overlay Register[0x15] = 0x%x\n", (BYTE)(cursor_state.width & 0x0f));
++ Write_Parameter(display, (BYTE)(((cursor_state.block & 0x1) << 7) | (cursor_state.height & 0x0f)));
++ pr_debug("Overlay Register[0x16] = 0x%x\n", (BYTE)(((cursor_state.block & 0x1) << 7) | (cursor_state.height & 0x0f)));
++}
++
++static void MinipugOverlay(unsigned int display)
++{
++ unsigned char byte;
++ Write_Command(display, COMMAND_OVLAY);
++ byte = (display_state[display].blocks[3].mode << 3) | (display_state[display].blocks[1].mode << 2) |
++ (display_state[display].three_layers << 4) |
++ (display_state[display].layer_composition << 0);
++ Write_Parameter(display, byte);
++ pr_debug("Overlay Register[0x18] = 0x%x\n", byte);
++}
++
++/* Set the address in RAM of the start of the RAM Character Generator */
++static void MinipugSetCharGenRamAddress(unsigned int display, unsigned int address)
++{
++ /* FIXME check bound of address */
++ Write_Command(display, COMMAND_CGRAM_ADR);
++ Write_Parameter(display, (BYTE)(address & 0xff)); /* Character Generator start address LSB (0x19) */
++ Write_Parameter(display, (BYTE)((address & 0xff00) >> 8)); /* MSB (0x1A) */
++}
++
++static void MinipugSetHorizontalScroll(unsigned int display, unsigned int offset)
++{
++ Write_Command(display, COMMAND_HDOT_SCR);
++ Write_Parameter(display, (BYTE)(offset & 0xff));
++ pr_debug("Horizontal scroll Register[0x1B] = 0x%x\n", offset);
++}
++
++static unsigned short MinipugGetHorizontalScroll(unsigned int display)
++{
++ Write_Command(display, COMMAND_HDOT_SCR);
++ return Read_Parameter(display);
++}
++
++static unsigned short MinipugGetCursorAddress(unsigned int display)
++{
++ unsigned char lsb, msb;
++ Write_Command(display, COMMAND_CSRR);
++ lsb = Read_Parameter(display) & 0xff;
++ msb = (Read_Parameter(display) << 8) & 0xff00;
++ return msb | lsb;
++}
++
++static void MinipugSetGrayscale(unsigned int display, unsigned int bits_per_pixel)
++{
++ unsigned char byte;
++ Write_Command(display, COMMAND_GRAYSCALE);
++ switch (bits_per_pixel) {
++ default:
++ case 1:
++ byte = 0x00; break;
++ case 2:
++ byte = 0x01; break;
++ case 4:
++ byte = 0x02; break;
++ }
++ Write_Parameter(display, byte);
++ pr_debug("Greyscale Register[0x20] = 0x%x\n", byte);
++}
++
++static unsigned char MinipugGetGreyScale(unsigned int display)
++{
++ Write_Command(display, COMMAND_CSRR);
++ return Read_Parameter(display) & 0x03;
++}
++
++static void MinipugWriteString(unsigned int display, char *string)
++{
++ int p;
++
++ p = 0;
++ Write_Command(display, COMMAND_MEMWRITE);
++ while (string[p] != '\0')
++ Write_Parameter(display, string[p++]);
++}
++
++static void MinipugWriteMemoryByte(unsigned int display, BYTE value)
++{
++ Write_Command(display, COMMAND_MEMWRITE);
++ Write_Parameter(display, value);
++}
++
++static unsigned char MinipugReadMemoryByte(unsigned int display)
++{
++ Write_Command(display, COMMAND_MEMREAD);
++ return Read_Parameter(display);
++}
++
++static unsigned char Read_Parameter(unsigned int display)
++{
++ return 0;
++}
++
++#endif
++
++static ssize_t megapug_read(struct file *, char *, size_t, loff_t *);
++static ssize_t megapug_write(struct file *, const char *, size_t, loff_t *);
++static int megapug_open(struct inode *, struct file *);
++static int megapug_release(struct inode *, struct file *);
++static int megapug_ioctl(struct inode *, struct file *, unsigned int, unsigned long);
++static int megapug_mmap(struct file *, struct vm_area_struct *vm);
++
++static struct file_operations megapug_fops = {
++ read: megapug_read,
++ write: megapug_write,
++ open: megapug_open,
++ release: megapug_release,
++ ioctl: megapug_ioctl,
++ mmap: megapug_mmap,
++};
++
++/* proc interface */
++static ssize_t proc_read_megapug(struct file *file, char *buf,
++ size_t nbytes, loff_t *ppos);
++static ssize_t proc_write_megapug(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos);
++
++static struct file_operations proc_megapug_operations = {
++ read: proc_read_megapug,
++ write: proc_write_megapug
++};
++static struct proc_dir_entry *proc_megapug;
++#define PROC_MEGAPUG "megapug"
++
++static void megapug_reset(void)
++{
++/*
++ samosa_write8(CPLD_LCD_CLR, 1 << CPLD_LCD_NRESET_BIT);
++ mdelay(1);
++ samosa_write8(CPLD_LCD_SET, 1 << CPLD_LCD_NRESET_BIT);
++ mdelay(3);
++*/
++}
++
++static void megapug_setup(void)
++{
++/*
++ MinipugInitDisplay(disp);
++ memset(minipug[disp].buffer, 0, RAM_SIZE);
++ minipug_update_graphics(disp, minipug[disp].buffer, RAM_SIZE, 0);
++*/
++}
++
++static int megapug_open(struct inode *inode, struct file *filp)
++{
++ struct megapug_dev *megapug_devp;
++
++ if (samosa_sm_present())
++ return -ENODEV;
++
++ megapug_devp = container_of(inode->i_cdev, struct megapug_dev, cdev);
++ filp->private_data = megapug_devp;
++
++ return 0;
++}
++
++static int megapug_release(struct inode *inode, struct file *filp)
++{
++ return 0;
++}
++
++static ssize_t megapug_read(struct file *filp, char *buf,
++ size_t size, loff_t *offp)
++{
++ struct megapug_dev *mp = (struct megapug_dev *)filp->private_data;
++ if (*offp >= RAM_SIZE-1)
++ return -EINVAL;
++ if (*offp+size > RAM_SIZE)
++ size = RAM_SIZE-*offp;
++ return copy_to_user(buf, &mp->buffer[*offp], size);
++}
++
++static ssize_t megapug_write(struct file *filp, const char *buf,
++ size_t size, loff_t *offp)
++{
++ struct megapug_dev *mp = (struct megapug_dev *)filp->private_data;
++ /* first RAM_SIZE address spaces are the frame buffer */
++ if (*offp < RAM_SIZE) {
++ unsigned long copied;
++ if (*offp+size > RAM_SIZE)
++ size = RAM_SIZE-*offp;
++ copied = copy_from_user(&mp->buffer[*offp], buf, size);
++ megapug_update_graphics(mp->buffer + *offp, size, *offp);
++ return copied;
++ } else if (size == sizeof(unsigned int)) {
++ loff_t command = (*offp)-RAM_SIZE;
++ unsigned int arg;
++ unsigned long copied = copy_from_user(&arg, buf, sizeof(arg));
++ if (command == 0) {
++ if ((arg == 1) || (arg == 2) || (arg == 4)) {
++ mp->bpp = arg;
++ megapug_setup();
++ }
++ }
++ return copied;
++ }
++ /* groups of double ints are display buffer update requests */
++ else if (size == (size / (sizeof(unsigned int)*2))*(sizeof(unsigned int)*2)) {
++ unsigned int offset;
++ unsigned int count;
++ size_t org_size = size;
++ while (size) {
++ unsigned long copied = copy_from_user(&offset, buf, sizeof(offset));
++ buf += sizeof(offset);
++ copied = copy_from_user(&count, buf, sizeof(count));
++ buf += sizeof(count);
++ if (offset >= RAM_SIZE)
++ pr_info("%s: ignoring, offset = 0x%x max = 0x%x\n", __func__, offset, RAM_SIZE-1);
++ else if (offset+count > RAM_SIZE)
++ pr_info("%s: ignoring, offset + count = 0x%x max = 0x%x\n", __func__, offset+count, RAM_SIZE-1);
++ else {
++ pr_debug("%s: updating offset %d count = %d on display\n", __func__, offset, count);
++ megapug_update_graphics(mp->buffer + offset, count, offset);
++ }
++ size -= sizeof(unsigned int)*2;
++ }
++ return org_size;
++ }
++ return -EINVAL;
++}
++
++/* maybe this will be handy in due course */
++static int megapug_ioctl(struct inode *inode, struct file *flip,
++ unsigned int command, unsigned long arg)
++{
++ int err;
++ err = -EINVAL;
++ return err;
++}
++
++static int megapug_mmap(struct file *filp, struct vm_area_struct *vma)
++{
++ struct megapug_dev *mp = (struct megapug_dev *)filp->private_data;
++
++ if (remap_vmalloc_range(vma, mp->buffer, 0)) {
++ pr_err("remap_pfn_range failed\n");
++ return -EAGAIN;
++ }
++ return 0;
++}
++
++static int proc_read_megapug(struct file *filp, char *buf,
++ size_t nbytes, loff_t *ppos)
++{
++ char outputbuf[512];
++ int count = 0;
++
++ /* all done in a single read */
++ if (*ppos > 0)
++ return 0;
++
++ count += sprintf(&outputbuf[count], "Megapug: major dev = %d\n", MAJOR(dev));
++ count += sprintf(&outputbuf[count], "Megapug: ready\n Bits per pixel %d\n", megapug.bpp);
++
++ if (count > nbytes) /* Assume output can be read at one time */
++ return -EINVAL;
++ if (copy_to_user(buf, outputbuf, count))
++ return -EFAULT;
++ *ppos += count;
++ return count;
++}
++
++static ssize_t proc_write_megapug(struct file *filp, const char *buffer,
++ size_t count, loff_t *ppos)
++{
++ /* struct minipug_dev *mp= (struct minipug_dev *)filp->private_data;
++ * if (strncmp(buff,"reset:",6)==0)
++ * newRegValue = simple_strtoul(buffer,&endp,0);
++ * a bold but simple claim is to have read it all
++ */
++ return count;
++}
++
++/* driver initialisation */
++
++static int __init megapug_probe(struct samosa_device *pdev)
++{
++/*
++ if (!minipug_ready(pdev->id)) {
++ dev_info(&pdev->dev, "%s: minipug %d not ready\n", __func__, pdev->id);
++ return -ENODEV;
++ }
++*/
++
++ megapug_setup();
++
++/*
++#ifdef USE_GRAPHICS_TEST
++ MinipugSetCursorAddress(pdev->id, display_state[0].blocks[2].start);
++ MinipugBlockFill(pdev->id, 2, (BYTE)(20 & 0xff));
++ MinipugGraphicTest(pdev->id, 2);
++// MinipugTextTest(pdev->id, 1);
++#endif
++*/
++
++ dev_info(&pdev->dev, "Megapug display support installed\n");
++
++ return 0;
++}
++
++static int __exit megapug_remove(struct samosa_device *dev)
++{
++ samosa_set_drvdata(dev, NULL);
++ return 0;
++}
++
++#ifdef CONFIG_PM
++static int megapug_suspend(struct samosa_device *dev, pm_message_t state)
++{
++// MegapugPowerSave();
++ return 0;
++}
++
++static int megapug_resume(struct samosa_device *dev)
++{
++// MegapugExitPowerSave();
++ megapug_update_graphics(megapug.buffer, RAM_SIZE, 0);
++ return 0;
++}
++#else /* CONFIG_PM */
++#define megapug_suspend NULL
++#define megapug_resume NULL
++#endif /* CONFIG_PM */
++
++#define megapug_shutdown NULL
++
++/* driver definition */
++static struct samosa_driver megapug_driver = {
++ .probe = megapug_probe,
++ .shutdown = megapug_shutdown,
++ .remove = __exit_p(megapug_remove),
++ .suspend = megapug_suspend,
++ .resume = megapug_resume,
++ .driver = {
++ .owner = THIS_MODULE,
++ .name = "megapug",
++ },
++};
++
++/* bus device */
++static struct samosa_device *megapug_device;
++
++/* class object */
++static struct class *megapug_class;
++
++static int __init megapug_init(void)
++{
++ int ret;
++
++ /* general initialisation */
++ spin_lock_init(&megapug_lock);
++
++ /* register a range of device nodes */
++ ret = alloc_chrdev_region(&dev, 0, 2, "megapug");
++
++ if (ret)
++ goto error;
++
++ /* create the minipug character devices */
++ megapug.bpp = DISPLAY_BPP;
++ megapug.buffer = (unsigned char *)vmalloc_user(BUFFER_SIZE);
++ if (!megapug.buffer) {
++ pr_err("%s: megapug not enough memory\n", __func__);
++ ret = -ENOMEM;
++ }
++
++ /* initialise character device */
++ cdev_init(&megapug.cdev, &megapug_fops);
++ /* claim ownership */
++ megapug.cdev.owner = THIS_MODULE;
++ /* add character device */
++ ret = cdev_add(&megapug.cdev, dev, 1);
++ if (ret) {
++ if (megapug.buffer)
++ vfree(megapug.buffer);
++ kobject_put(&megapug.cdev.kobj);
++ goto error_region;
++ }
++
++ /* create the class and devices */
++ megapug_class = class_create(THIS_MODULE, "megapug");
++
++ if (!device_create(megapug_class, NULL, dev, NULL, "megapug%d", 0))
++ goto error_class_device;
++ /* register the device on a bus. */
++ megapug_device = samosa_device_register_simple("megapug", 0);
++ if (!megapug_device)
++ goto error_bus;
++
++ /* create proc access to displays */
++ proc_megapug = create_proc_entry(PROC_MEGAPUG, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_megapug)
++ proc_megapug->proc_fops = &proc_megapug_operations;
++
++ /* register the driver */
++ return samosa_driver_register(&megapug_driver);
++
++error_bus:
++ /* remove samosa device */
++ samosa_device_unregister(megapug_device);
++error_class_device:
++ device_destroy(megapug_class, dev);
++error_region:
++ unregister_chrdev_region(dev, 1);
++error:
++ return ret;
++}
++
++static void __exit megapug_exit(void)
++{
++ /* remove proc entry */
++ remove_proc_entry(PROC_MEGAPUG, NULL);
++
++ /* remove class device */
++ device_destroy(megapug_class, dev);
++
++ /* remove samosa device */
++ samosa_device_unregister(megapug_device);
++
++ /* remove character device */
++ cdev_del(&megapug.cdev);
++
++ /* free buffer */
++ vfree(megapug.buffer);
++
++ /* remove driver */
++ samosa_driver_unregister(&megapug_driver);
++
++ /* unregister region */
++ unregister_chrdev_region(dev, 1);
++
++ /* remove class */
++ class_destroy(megapug_class);
++}
++
++module_init(megapug_init);
++module_exit(megapug_exit);
++
++MODULE_AUTHOR("Nick Bane <nick@cecomputing.co.uk>");
++MODULE_DESCRIPTION("Megapug display interface via samosa bus on Balloon");
++MODULE_LICENSE("GPL");
+Index: linux-2.6.31/include/video/megapug.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.31/include/video/megapug.h 2010-01-04 21:07:18.000000000 +0000
+@@ -0,0 +1,2 @@
++/* graphics display interface utility for Toby Churchill Megapug device */
++void megapug_update_graphics(unsigned char *data, unsigned int len, unsigned int offset);
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-minipug.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-minipug.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-minipug.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,1163 @@
+Toby Churchill Lightwriter Minipug display driver
+
+Minipug is actually epson S1D137000A1 driver over Samosa
+
+from: Nick Bane <nick@cecomputing.co.uk>
+
+Signed-off-by: Wookey <wookey@wookware.org>
+
+Index: linux-2.6.31/drivers/char/Kconfig
+===================================================================
+--- linux-2.6.31.orig/drivers/char/Kconfig 2010-01-04 22:35:54.000000000 +0000
++++ linux-2.6.31/drivers/char/Kconfig 2010-01-06 14:16:46.000000000 +0000
+@@ -679,6 +679,19 @@
+ help
+ Virtio console for use with lguest and other hypervisors.
+
++config MINIPUG
++ tristate "Minipug LCD display"
++ depends on SAMOSA
++ default y
++ help
++ 456*80 LCD display driven down Samosa bus (for Balloonboard).
++
++config MINIPUG_ANIMATE
++ tristate "Animated Minipug displays till opened"
++ depends on MINIPUG
++ default y
++ help
++ Minipug will display an animated sequence till opened
+
+ config HVCS
+ tristate "IBM Hypervisor Virtual Console Server support"
+Index: linux-2.6.31/drivers/char/Makefile
+===================================================================
+--- linux-2.6.31.orig/drivers/char/Makefile 2010-01-04 22:35:54.000000000 +0000
++++ linux-2.6.31/drivers/char/Makefile 2010-01-06 14:16:45.000000000 +0000
+@@ -112,6 +112,7 @@
+ js-rtc-y = rtc.o
+
+ obj-$(CONFIG_SAMOSA) += samosa.o
++obj-$(CONFIG_MINIPUG) += minipug.o
+
+ # Files generated that shall be removed upon make clean
+ clean-files := consolemap_deftbl.c defkeymap.c
+Index: linux-2.6.31/drivers/char/minipug.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.31/drivers/char/minipug.c 2010-01-06 14:22:19.000000000 +0000
+@@ -0,0 +1,1107 @@
++/*
++ * linux/drivers/char/minipug.c
++ *
++ * file interface for minipug displays on the balloon samosa bus
++ * Copyright (c) N C Bane 2005 2006 for Toby Churchill Ltd
++ *
++*/
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/fs.h>
++#include <linux/uaccess.h>
++
++#if defined(CONFIG_MACH_BALLOON2)
++#include <mach/balloon2.h>
++#endif
++#if defined(CONFIG_MACH_BALLOON3)
++#include <mach/balloon3.h>
++#endif
++#include <asm/cacheflush.h>
++
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/proc_fs.h>
++#include <linux/vmalloc.h>
++#include <linux/platform_device.h>
++#include <linux/spinlock.h>
++#include "linux/cdev.h"
++#include "linux/timer.h"
++#include <linux/samosa.h>
++
++#define MINIPUG_DISPLAYS 2
++/* uncomment USE_PLATFORM_BUS to use the platform rather than the samosa bus */
++#define USE_GRAPHICS_TEST
++/* #define USE_GRAPHICS_TEST_PIXEL_TEST */
++
++#ifdef CONFIG_MINIPUG_ANIMATE
++static int animate = 1;
++#define CONFIG_MINIPUG_ANIMATE_RATE 8
++#endif
++
++/* character device start number */
++static dev_t dev;
++
++static spinlock_t minipug_lock;
++
++/* minipug per device data */
++static struct minipug_dev {
++ unsigned int display;
++ struct cdev cdev;
++ unsigned char *buffer;
++ unsigned int bpp;
++#ifdef CONFIG_MINIPUG_ANIMATE
++ struct timer_list minipug_timer;
++ int animate_block;
++ unsigned int animate_index;
++#endif
++} minipug[MINIPUG_DISPLAYS];
++
++/* total minipug on board ram */
++#define BUFFER_SIZE (32*1024)
++
++/* Minipug manipulation code */
++
++typedef unsigned char BYTE;
++typedef unsigned char BOOLEAN;
++#define TRUE 1
++#define FALSE 0
++
++/* width, in characters (8 bits wide) */
++#define DISPLAY_WIDTH 57
++/* height, in lines */
++#define DISPLAY_HEIGHT 80
++/* screen start addresses */
++#define DISPLAY_BPP 4
++#define TEXT_PAGE_START_ADDR 0x0000
++#define GRAPHICS_PAGE_0_START_ADDR (0x1000)
++#define GRAPHICS_PAGE_1_START_ADDR(bpp) (GRAPHICS_PAGE_0_START_ADDR+(DISPLAY_HEIGHT*DISPLAY_ADDRESSES_PER_LINE(bpp)))
++/* CGRAM start address */
++#define CGRAM_START_ADDR(bpp) (GRAPHICS_PAGE_1_START_ADDR(bpp)+(DISPLAY_HEIGHT*DISPLAY_ADDRESSES_PER_LINE(bpp)))
++
++typedef enum {
++ COMMAND_SYSTEM_SET = 0x40, /* system set, takes 8 bytes */
++ COMMAND_POWER_SAVE = 0x53, /* power save, takes 0 bytes */
++ COMMAND_DISP_ON = 0x59, /* display on, takes 1 byte */
++ COMMAND_DISP_OFF = 0x58, /* display off, takes 1 byte */
++ COMMAND_SCROLL = 0x44, /* set start address and size, takes 10 bytes */
++ COMMAND_CSRFORM = 0x5D, /* set cursor type, takes 2 bytes */
++ COMMAND_CSRDIR = 0x4C, /* set cursor direction, takes 0 bytes, but lower two bits are significant*/
++ COMMAND_OVLAY = 0x5B, /* set overlay format, takes 1 byte */
++ COMMAND_CGRAM_ADR = 0x5C, /* set start of character gen ram, takes 2 bytes */
++ COMMAND_HDOT_SCR = 0x5A, /* set horizontal scroll pos, takes 1 byte */
++ COMMAND_CSRW = 0x46, /* set cursor address, takes 2 bytes */
++ COMMAND_CSRR = 0x47, /* read cursor address, takes 2 bytes */
++ COMMAND_GRAYSCALE = 0x60, /* set grayscale depth bpp, takes 1 byte */
++ COMMAND_MEMWRITE = 0x42, /* write to memory */
++ COMMAND_MEMREAD = 0x43 /* read from memory */
++} MiniPug_LCD_Commands_t;
++
++typedef enum {
++ DISPLAY_BLOCK_OFF = 0,
++ DISPLAY_BLOCK_NO_FLASHING = 1,
++ DISPLAY_BLOCK_2HZ_FLASHING = 2,
++ DISPLAY_BLOCK_16HZ_FLASHING = 3
++} Display_Block_State_t;
++
++typedef enum {
++ DISPLAY_MODE_TEXT = 0,
++ DISPLAY_MODE_GRAPHICS = 1
++} Display_Block_Mode_t;
++
++typedef enum {
++ DISPLAY_LAYER_COMPOSITION_OR = 0,
++ DISPLAY_LAYER_COMPOSITION_EXOR = 1,
++ DISPLAY_LAYER_COMPOSIITON_AND = 3
++} Display_Layer_Composition_t;
++
++typedef struct {
++ Display_Block_State_t state;
++ Display_Block_Mode_t mode;
++ unsigned int start;
++ unsigned int size;
++} DisplayBlockState_t;
++
++typedef struct {
++ DisplayBlockState_t blocks[5];
++ Display_Block_State_t cursor;
++ unsigned char three_layers;
++ Display_Layer_Composition_t layer_composition;
++ unsigned int horizontal_address_range; /* Horizontal Size of virtual space from which the block is taken */
++ unsigned int character_bytes_per_row; /* Actual number of horizontal bytes per displayed line */
++ unsigned int total_character_bytes_per_row; /* Character bytes per row plus blanking bytes */
++} DisplayState_t;
++
++#define MAX_DISPLAYS 2
++static DisplayState_t display_state[] = {
++ {
++ {
++ {DISPLAY_BLOCK_NO_FLASHING, DISPLAY_MODE_GRAPHICS, 0, 0}, /* Block 1 */
++ {DISPLAY_BLOCK_OFF, 0, 0, 0}, /* Block 2 no mode only */
++ {DISPLAY_BLOCK_OFF, DISPLAY_MODE_GRAPHICS, 0, 0}, /* Block 3 */
++ {DISPLAY_BLOCK_OFF, DISPLAY_MODE_GRAPHICS, 0, 0} /* Block 4 */
++ },
++ DISPLAY_BLOCK_OFF, /* Cursor */
++ 0, /* three layers or two */
++ DISPLAY_LAYER_COMPOSITION_OR,
++ 0 /* Horizontal address range */
++ }, /* Display 1 */
++ {
++ {
++ {DISPLAY_BLOCK_OFF, DISPLAY_MODE_GRAPHICS, 0, 0}, /* Block 1 */
++ {DISPLAY_BLOCK_OFF, 0, 0, 0}, /* Block 2 no mode only */
++ {DISPLAY_BLOCK_OFF, DISPLAY_MODE_GRAPHICS, 0, 0}, /* Block 3 */
++ {DISPLAY_BLOCK_OFF, DISPLAY_MODE_GRAPHICS, 0, 0} /* Block 4 */
++ },
++ DISPLAY_BLOCK_NO_FLASHING, /* Cursor */
++ 0, /* three layers or two */
++ DISPLAY_LAYER_COMPOSITION_OR,
++ 0 /* Horizontal address range */
++ }
++ }; /* Display 2 */
++
++typedef enum { CURSOR_DIRECTION_RIGHT = 0,
++ CURSOR_DIRECTION_LEFT = 1,
++ CURSOR_DIRECTION_UP = 2,
++ CURSOR_DIRECTION_DOWN = 3
++} Cursor_Direction_t;
++
++typedef struct {
++ unsigned char height;
++ unsigned char width;
++ unsigned char block;
++ Cursor_Direction_t shift_direction;
++} Cursor_State_t;
++
++Cursor_State_t cursor_state = {8, 8, 1, CURSOR_DIRECTION_RIGHT};
++
++typedef struct {
++ unsigned int x_org;
++ unsigned int y_org;
++ unsigned int x_size;
++ unsigned int y_size;
++} Display_Region_t;
++
++/* Display Size Parameters */
++#define HORIZONTAL_CHAR_SIZE 8
++#define VERTICAL_CHAR_SIZE 8
++#define DISPLAY_PIXEL_WIDTH 453
++#define DISPLAY_PIXEL_HEIGHT 80
++#define RAM_SIZE 0x8000
++
++/* Memory Configuration Register */
++#define SCREEN_ORIGIN_COMPENSATION_SET (1 << 5)
++#define DEFAULT_SCREEN_SET_VALUE (1 << 4)
++#define SINGLE_PANEL_DRIVE 0
++#define DUAL_PANEL_DRIVE (1 << 3)
++#define CHAR_HEIGHT_8_BITS 0
++#define CHAR_HEIGHT_16_BITS (1 << 2)
++#define CGROM_SELECT 0
++#define CGRAM_SELECT 1
++
++/* Horizontal Character Size Register */
++#define AC_DRIVE_TWO_FRAMES (1 << 7)
++#define AC_DRIVE_16_LINES 0
++
++/* OVLAY Register bits */
++#define OVERLAY_TWO_LAYERS 0
++#define OVERLAY_THREE_LAYERS (1 << 4)
++#define SCREEN_BLOCK_3_GRAPHICS 0
++
++static unsigned char MinipugReady(int disp)
++{
++#ifdef USE_READY
++ return samosa_read8(CPLD_LCD_RO_SET) & (1 << (disp ? CPLD_LCD_RO_LCD1_nWAIT_BIT : CPLD_LCD_RO_LCD0_nWAIT_BIT));
++#else
++ return 1;
++#endif
++}
++
++static unsigned char minipug_ready(int display)
++{
++ unsigned char ret;
++ ret = (unsigned char) samosa_read8(CPLD_LCD_RO_SET) & (1 << (display ? CPLD_LCD_RO_LCD1_nWAIT_BIT : CPLD_LCD_RO_LCD0_nWAIT_BIT));
++ pr_debug("%s:returns %x\n", __func__, ret);
++ return ret;
++}
++
++/* optimised for speed */
++static inline void Write_ParameterBlock(unsigned int display, unsigned char *data, unsigned int count)
++ { samosa_write_block8((display ? CPLD_LCD1_DATA_SET : CPLD_LCD0_DATA_SET), data, count); }
++static inline void Write_Parameter(unsigned int display, unsigned char parameter)
++ { samosa_write8((display ? CPLD_LCD1_DATA_SET : CPLD_LCD0_DATA_SET), parameter); }
++static inline void Write_Command(unsigned int display, unsigned char command) { samosa_write8((display ? CPLD_LCD1_COMMAND_SET : CPLD_LCD0_COMMAND_SET), command); }
++
++static inline void MinipugSetCursorAddress(unsigned int display, unsigned int addr)
++{
++ Write_Command(display, COMMAND_CSRW);
++ Write_Parameter(display, (BYTE)(addr & 0xff));
++ Write_Parameter(display, (BYTE)((addr >> 8) & 0xff));
++}
++
++static int MinipugInitDisplay(unsigned int display);
++static void MinipugSetAddresses(unsigned int display,
++ unsigned int block1_addr, unsigned int block1_size,
++ unsigned int block2_addr, unsigned int block2_size,
++ unsigned int block3_addr,
++ unsigned int block4_addr);
++static void MinipugSystemSet(unsigned int display);
++static void MinipugPowerSave(unsigned int display);
++static void MinipugDisplayOn(unsigned int display);
++static void MinipugDisplayOff(unsigned int display);
++static void MinipugCursorDir(unsigned int display);
++static void MinipugScroll(unsigned int display);
++static void MinipugSetCursorFormat(unsigned int display);
++static void MinipugOverlay(unsigned int display);
++static void MinipugSetCharGenRamAddress(unsigned int display, unsigned int address);
++static void MinipugSetHorizontalScroll(unsigned int display, unsigned int offset);
++static unsigned short MinipugGetHorizontalScroll(unsigned int display);
++static unsigned short MinipugGetCursorAddress(unsigned int display);
++static void MinipugSetGrayscale(unsigned int display, unsigned int bits_per_pixel);
++static unsigned char MinipugGetGreyScale(unsigned int display);
++static void MinipugWriteMemoryByte(unsigned int display, BYTE value);
++static unsigned char MinipugReadMemoryByte(unsigned int display);
++static void MinipugWriteMemoryBlock(unsigned int display, int count, unsigned char b);
++static unsigned char Read_Parameter(unsigned int display);
++static void MinipugBlockFill(unsigned int display, unsigned int block, BYTE fill_value);
++static void MinipugClose(unsigned int display);
++static void MinipugWriteString(unsigned int display, char *string);
++static void MinipugGraphicTest(unsigned int display, unsigned int block);
++static void MinipugPixelFill(unsigned int display, unsigned int block, Display_Region_t *area, BYTE fill_value);
++static void MinipugSetByte(unsigned int display, unsigned int block, unsigned int x, unsigned int y, BYTE fill);
++static void MinipugTextTest(unsigned int display, unsigned int block);
++
++static BOOLEAN CheckDisplay(unsigned int display)
++{
++ if (display > MAX_DISPLAYS)
++ return FALSE;
++ else
++ return TRUE;
++}
++
++void minipug_update_graphics(unsigned int disp, unsigned char *data, unsigned int len, unsigned int offset)
++{
++ spin_lock(&minipug_lock);
++ MinipugSetCursorAddress(disp, display_state[disp].blocks[2].start + offset);
++ Write_Command(disp, COMMAND_MEMWRITE);
++ Write_ParameterBlock(disp, data, len);
++ spin_unlock(&minipug_lock);
++}
++EXPORT_SYMBOL(minipug_update_graphics);
++
++static void MinipugBlockFill(unsigned int display, unsigned int block, BYTE fill_value)
++{
++ int i, j;
++ unsigned char byte = 0;
++ unsigned char bits_per_pixel = minipug[display].bpp;
++
++ pr_debug("Block fill display %d with 0x%x\n", display, fill_value);
++ switch (bits_per_pixel) {
++ case 1:
++ if ((fill_value & 0x1) == 1)
++ byte = 0xff;
++ else
++ byte = 0;
++ break;
++ case 2:
++ fill_value = fill_value & 0x3;
++ byte = (BYTE)((fill_value << 6) | (fill_value << 4) |
++ (fill_value << 2) | (fill_value & 0xf));
++ break;
++ case 4:
++ byte = (BYTE)(((fill_value & 0xf) << 4) | (fill_value & 0xf));
++ break;
++ break;
++ }
++ MinipugWriteMemoryByte(display, fill_value);
++ for (i = 0; i < display_state[display].blocks[block].size; i++) {
++ for (j = 0; j < display_state[display].horizontal_address_range; j++) {
++ Write_Parameter(display, byte);
++ }
++ }
++}
++
++static void MinipugPixelFill(unsigned int display, unsigned int block, Display_Region_t *area, BYTE fill_value)
++{
++ int i, j;
++
++ for (i = 0; i < area->y_size; i++) {
++ for (j = 0; j < area->x_size; j++) {
++ MinipugSetByte(display, block, area->x_org + j, area->y_org + i, fill_value);
++ }
++ }
++}
++
++static void MinipugSetByte(unsigned int display, unsigned int block, unsigned int x, unsigned int y, BYTE fill)
++{
++ unsigned int byte_address, x_offset = 0;
++ unsigned char bits_per_pixel = minipug[display].bpp;
++ switch (bits_per_pixel) {
++ case 1:
++ x_offset = (x >> 3);
++ break;
++ case 2:
++ x_offset = (x >> 2);
++ break;
++ case 4:
++ x_offset = (x >> 1);
++ break;
++ }
++ byte_address = display_state[display].blocks[block].start
++ + (y * display_state[display].horizontal_address_range)
++ + x_offset;
++ MinipugSetCursorAddress(display, byte_address);
++ MinipugWriteMemoryByte(display, fill);
++}
++
++#ifdef CONFIG_MINIPUG_ANIMATE
++static void MinipugGraphicAnimate(unsigned long display) {
++ if (animate) {
++ unsigned int i;
++ int block = minipug[display].animate_block;
++ struct timer_list *t = &minipug[display].minipug_timer;
++ Display_Region_t blob;
++ blob.x_org = 100;
++ blob.y_org = 30;
++ blob.x_size = 10;
++ blob.y_size = 10;
++ for (i = 0; i < 16; i++) {
++ MinipugPixelFill(display, block, &blob, i<<4 | i);
++ blob.x_org = 100 + ((i + minipug[display].animate_index) % 16) * 12 ;
++ }
++ minipug[display].animate_index++;
++ init_timer(t);
++ t->expires = jiffies + HZ/CONFIG_MINIPUG_ANIMATE_RATE;
++ t->data = display;
++ t->function = MinipugGraphicAnimate;
++ add_timer(t);
++ }
++}
++#endif
++
++static void MinipugGraphicTest(unsigned int display, unsigned int block)
++{
++ int i;
++ Display_Region_t blob;
++
++#ifdef USE_GRAPHICS_TEST_PIXEL_TEST
++ pr_debug("%s: block start address is 0x%x\n", __func__,
++ display_state[display].blocks[block].start);
++ for (i = 0; i < 10; i++) {
++ MinipugSetByte(display, block, 0, i, 255);
++ MinipugSetByte(display, block, 8, i, 255);
++ }
++#else
++
++ MinipugSetCursorAddress(display, display_state[display].blocks[block].start);
++ MinipugWriteMemoryByte(display, 255);
++ for (i = 0; i < display_state[display].character_bytes_per_row-1; i++)
++ Write_Parameter(display, 255);
++ MinipugSetCursorAddress(display, display_state[display].blocks[block].start
++ + (display_state[display].horizontal_address_range)
++ * (display_state[display].blocks[block].size - 1));
++ MinipugWriteMemoryByte(display, 255);
++ for (i = 0; i < display_state[display].character_bytes_per_row-1; i++)
++ Write_Parameter(display, 255);
++ blob.x_org = 100;
++ blob.y_org = 30;
++ blob.x_size = 10;
++ blob.y_size = 10;
++ for (i = 0; i < 16; i++) {
++ MinipugPixelFill(display, block, &blob, i<<4 | i);
++ blob.x_org += 12;
++ }
++#ifdef CONFIG_MINIPUG_ANIMATE
++ minipug[display].animate_block = block;
++ MinipugGraphicAnimate(display);
++#endif
++#endif
++}
++
++static void MinipugTextTest(unsigned int display, unsigned int block)
++{
++ unsigned char message[250];
++ int i;
++
++ for (i = 0; i < 9; i++) {
++ MinipugSetCursorAddress(display, display_state[display].blocks[block].start + (display_state[display].horizontal_address_range * i) + 20);
++ sprintf(message, "T C L");
++ MinipugWriteString(display, message);
++ mdelay(200);
++ sprintf(message, " ");
++ MinipugSetCursorAddress(display, display_state[display].blocks[block].start + (display_state[display].horizontal_address_range * i) + 20);
++ MinipugWriteString(display, message);
++ }
++ MinipugSetCursorAddress(display, display_state[display].blocks[block].start + (display_state[display].horizontal_address_range * 9) + 20);
++ sprintf(message, "T C L");
++ MinipugWriteString(display, message);
++}
++
++static int MinipugInitDisplay(unsigned int display)
++{
++ unsigned int graphic_block_size, text_block_size;
++ unsigned char bits_per_pixel = minipug[display].bpp;
++
++ if (!CheckDisplay(display))
++ return FALSE;
++ display_state[display].character_bytes_per_row = ((DISPLAY_PIXEL_WIDTH * bits_per_pixel)/8);
++ display_state[display].total_character_bytes_per_row = display_state[display].character_bytes_per_row + 2;
++ display_state[display].horizontal_address_range = display_state[display].total_character_bytes_per_row;
++ graphic_block_size = display_state[display].horizontal_address_range * DISPLAY_PIXEL_HEIGHT;
++ text_block_size = display_state[display].horizontal_address_range * 10;
++ pr_debug("Display #%d\n", display);
++ pr_debug("Graphic block size = 0x%x\n", graphic_block_size);
++ pr_debug("Text block size = 0x%x\n", text_block_size);
++ pr_debug("character_bytes_per_row = %d\n",
++ display_state[display].character_bytes_per_row);
++ pr_debug("total_character_bytes_per_row = %d\n",
++ display_state[display].total_character_bytes_per_row);
++ pr_debug("horizontal_address_range = %d\n",
++ display_state[display].horizontal_address_range);
++ display_state[display].blocks[1].start = 0x0000;
++ display_state[display].blocks[1].size = 80; /* 80 when graphics 10 when text? */
++ display_state[display].blocks[1].state = DISPLAY_BLOCK_NO_FLASHING;
++ display_state[display].blocks[1].mode = DISPLAY_MODE_TEXT;
++ display_state[display].blocks[2].start = text_block_size;
++ display_state[display].blocks[2].size = 80; /* 80 because its graphics */
++ display_state[display].blocks[2].state = DISPLAY_BLOCK_NO_FLASHING;
++ display_state[display].blocks[2].mode = 0;
++ display_state[display].blocks[3].start = text_block_size + graphic_block_size;
++ display_state[display].blocks[3].size = 0;
++ display_state[display].blocks[3].state = DISPLAY_BLOCK_OFF;
++ display_state[display].blocks[3].mode = DISPLAY_MODE_TEXT;
++ display_state[display].blocks[4].start = graphic_block_size + text_block_size + text_block_size;
++ display_state[display].blocks[4].size = 0;
++ display_state[display].blocks[4].state = DISPLAY_BLOCK_OFF;
++ display_state[display].blocks[4].mode = 0;
++
++ MinipugSystemSet(display);
++ MinipugScroll(display);
++ MinipugSetHorizontalScroll(display, 0);
++ MinipugOverlay(display);
++ MinipugDisplayOff(display);
++ MinipugSetCursorAddress(display, display_state[display].blocks[2].start);
++ MinipugBlockFill(display, 2, 0);
++ MinipugSetCursorAddress(display, display_state[display].blocks[1].start);
++ MinipugBlockFill(display, 1, 0x20);
++ MinipugDisplayOn(display);
++ MinipugSetGrayscale(display, bits_per_pixel);
++ MinipugSetCursorFormat(display);
++ return TRUE;
++}
++
++static void MinipugSetAddresses(unsigned int display,
++ unsigned int block1_addr, unsigned int block1_size,
++ unsigned int block2_addr, unsigned int block2_size,
++ unsigned int block3_addr,
++ unsigned int block4_addr)
++{
++ pr_debug("Setting block 1 start = 0x%x\n", block1_addr);
++ display_state[display].blocks[1].start = block1_addr;
++ pr_debug("Setting block 1 size = 0x%x\n", block1_size);
++ display_state[display].blocks[1].size = block1_size;
++ pr_debug("Setting block 2 start = 0x%x\n", block2_addr);
++ display_state[display].blocks[2].start = block2_addr;
++ pr_debug("Setting block 2 size = 0x%x\n", block2_size);
++ display_state[display].blocks[2].size = block2_size;
++ pr_debug("Setting block 3 start = 0x%x\n", block3_addr);
++ display_state[display].blocks[3].start = block3_addr;
++ pr_debug("Setting block 4 start = 0x%x\n", block4_addr);
++ display_state[display].blocks[4].start = block4_addr;
++}
++
++static void MinipugSystemSet(unsigned int display)
++{
++ unsigned char byte;
++
++ Write_Command(display, COMMAND_SYSTEM_SET);
++ byte = DEFAULT_SCREEN_SET_VALUE | SCREEN_ORIGIN_COMPENSATION_SET
++ | SINGLE_PANEL_DRIVE | CHAR_HEIGHT_8_BITS | CGROM_SELECT;
++ Write_Parameter(display, byte); /* P1 Memory configuration register (0x00) */
++ pr_debug("Register[0] = 0x%x\n", byte);
++ byte = AC_DRIVE_TWO_FRAMES | ((HORIZONTAL_CHAR_SIZE - 1) & 0x0f);
++ Write_Parameter(display, byte); /* P2 Horizontal Character size register (0x01) */
++ pr_debug("Register[1] = 0x%x\n", byte);
++ byte = (VERTICAL_CHAR_SIZE - 1) & 0xf;
++ Write_Parameter(display, byte); /* P3 Vertical Character Size Register (0x02) */
++ pr_debug("Register[2] = 0x%x\n", byte);
++ byte = (BYTE)((display_state[display].character_bytes_per_row & 0xff) - 1);
++ Write_Parameter(display, byte); /* P4 Character Bytes per Row Register (0x03) */
++ pr_debug("Register[3] = 0x%x\n", byte);
++ byte = (BYTE)(display_state[display].total_character_bytes_per_row & 0xff);
++ Write_Parameter(display, byte); /* Total Character Bytes per Row Register (0x04) */
++ pr_debug("Register[4] = 0x%x\n", byte);
++ byte = (DISPLAY_PIXEL_HEIGHT & 0xff);
++ Write_Parameter(display, byte); /* Frame Height Register (0x05) */
++ pr_debug("Register[5] = 0x%x\n", byte);
++ byte = (BYTE)(display_state[display].horizontal_address_range & 0xff);
++ Write_Parameter(display, byte); /* Horizontal Address Range Register (low) */
++ pr_debug("Register[6] = 0x%x\n", byte);
++ byte = (BYTE)((display_state[display].horizontal_address_range & 0xff00) >> 8);
++ Write_Parameter(display, byte); /* Horizontal Address Range Register (high) */
++ pr_debug("Register[7] = 0x%x\n", byte);
++}
++
++static void MinipugPowerSave(unsigned int display)
++{
++ Write_Command(display, COMMAND_POWER_SAVE);
++}
++
++static void MinipugExitPowerSave(unsigned int display)
++{
++ /* this is copied from the msp430 code minipug handler
++ * it is prefaced by "dunno why this convoluted sequence is
++ * necessary but ..."
++ * it could do with review
++ */
++ MinipugSystemSet(display);
++ while (!MinipugReady(display))
++ ;
++ mdelay(20);
++ MinipugSystemSet(display);
++ while (!MinipugReady(display))
++ ;
++ mdelay(20);
++ /* 2 dummy writes as specified by epson controller code */
++ MinipugDisplayOn(display);
++ MinipugDisplayOn(display);
++ MinipugSetGrayscale(display, minipug[display].bpp);
++}
++
++static void MinipugDisplayOn(unsigned int display)
++{
++ unsigned char byte;
++
++ Write_Command(display, COMMAND_DISP_ON);
++ byte = (display_state[display].blocks[3].state << 6) |
++ (display_state[display].blocks[2].state << 4) |
++ (display_state[display].blocks[1].state << 2) |
++ (display_state[display].cursor);
++ Write_Parameter(display, byte); /* Display Enable Register (0x09) */
++ pr_debug("Display On Register[0x9] = 0x%x\n", byte);
++}
++
++static void MinipugDisplayOff(unsigned int display)
++{
++ unsigned char byte;
++ Write_Command(display, COMMAND_DISP_OFF);
++ byte = (display_state[display].blocks[3].state << 6) |
++ (display_state[display].blocks[2].state << 4) |
++ (display_state[display].blocks[1].state << 2) |
++ (display_state[display].cursor);
++ Write_Parameter(display, byte); /* Display Enable Register (0x09) */
++ pr_debug("Display Off Register[0x9] = 0x%x\n", byte);
++}
++
++static void MinipugCursorDir(unsigned int display)
++{
++ Write_Command(display, (BYTE)(COMMAND_CSRDIR | (cursor_state.shift_direction & 3)));
++}
++
++static void MinipugScroll(unsigned int display)
++{
++ unsigned char byte;
++
++ Write_Command(display, COMMAND_SCROLL);
++ byte = (display_state[display].blocks[1].start & 0xff);
++ Write_Parameter(display, byte); /* Screen Block 1 Start Address Register (0x0b) */
++ pr_debug("Block 1 Start Register[0x0b] = 0x%x\n", byte);
++ byte = (display_state[display].blocks[1].start & 0xff00) >> 8;
++ Write_Parameter(display, byte); /* Screen Block 1 Start Address Register (0x0c) */
++ pr_debug("Block 1 Start Register[0x0c] = 0x%x\n", byte);
++ byte = display_state[display].blocks[1].size & 0xff;
++ Write_Parameter(display, byte); /* Screen Block 1 size Register (0x0d) */
++ pr_debug("Block 1 Size Register[0x0d] = 0x%x\n", byte);
++ byte = (display_state[display].blocks[2].start & 0xff);
++ Write_Parameter(display, byte); /* Screen Block 2 Start Address Register (0x0e) */
++ pr_debug("Block 2 Start Register[0x0e] = 0x%x\n", byte);
++ byte = (display_state[display].blocks[2].start & 0xff00) >> 8;
++ Write_Parameter(display, byte); /* Screen Block 2 Start Address Register (0x0f) */
++ pr_debug("Block 2 Start Register[0x0f] = 0x%x\n", byte);
++ byte = display_state[display].blocks[2].size & 0xff;
++ Write_Parameter(display, byte); /* Screen Block 2 size Register (0x10) */
++ pr_debug("Block 2 Size Register[0x10] = 0x%x\n", byte);
++ byte = (display_state[display].blocks[3].start & 0xff);
++ Write_Parameter(display, byte); /* Screen Block 3 Start Address Register (0x11) */
++ pr_debug("Block 3 Start Register[0x11] = 0x%x\n", byte);
++ byte = (display_state[display].blocks[3].start & 0xff00) >> 8;
++ Write_Parameter(display, byte); /* Screen Block 3 Start Address Register (0x12) */
++ pr_debug("Block 3 Start Register[0x12] = 0x%x\n", byte);
++ byte = (display_state[display].blocks[4].start & 0xff);
++ Write_Parameter(display, byte); /* Screen Block 4 Start Address Register (0x13) */
++ pr_debug("Block 4 Start Register[0x13] = 0x%x\n", byte);
++ byte = (display_state[display].blocks[4].start & 0xff00) >> 8;
++ Write_Parameter(display, byte); /* Screen Block 4 Start Address Register (0x14) */
++ pr_debug("Block 4 Start Register[0x14] = 0x%x\n", byte);
++}
++
++static void MinipugSetCursorFormat(unsigned int display)
++{
++ Write_Command(display, COMMAND_CSRFORM);
++ Write_Parameter(display, (BYTE)(cursor_state.width & 0x0f));
++ pr_debug("Overlay Register[0x15] = 0x%x\n", (BYTE)(cursor_state.width & 0x0f));
++ Write_Parameter(display, (BYTE)(((cursor_state.block & 0x1) << 7) | (cursor_state.height & 0x0f)));
++ pr_debug("Overlay Register[0x16] = 0x%x\n", (BYTE)(((cursor_state.block & 0x1) << 7) | (cursor_state.height & 0x0f)));
++}
++
++static void MinipugOverlay(unsigned int display)
++{
++ unsigned char byte;
++ Write_Command(display, COMMAND_OVLAY);
++ byte = (display_state[display].blocks[3].mode << 3) | (display_state[display].blocks[1].mode << 2) |
++ (display_state[display].three_layers << 4) |
++ (display_state[display].layer_composition << 0);
++ Write_Parameter(display, byte);
++ pr_debug("Overlay Register[0x18] = 0x%x\n", byte);
++}
++
++/* Set the address in RAM of the start of the RAM Character Generator */
++static void MinipugSetCharGenRamAddress(unsigned int display, unsigned int address)
++{
++ /* FIXME check bound of address */
++ Write_Command(display, COMMAND_CGRAM_ADR);
++ Write_Parameter(display, (BYTE)(address & 0xff)); /* Character Generator start address LSB (0x19) */
++ Write_Parameter(display, (BYTE)((address & 0xff00) >> 8)); /* MSB (0x1A) */
++}
++
++static void MinipugSetHorizontalScroll(unsigned int display, unsigned int offset)
++{
++ Write_Command(display, COMMAND_HDOT_SCR);
++ Write_Parameter(display, (BYTE)(offset & 0xff));
++ pr_debug("Horizontal scroll Register[0x1B] = 0x%x\n", offset);
++}
++
++static unsigned short MinipugGetHorizontalScroll(unsigned int display)
++{
++ Write_Command(display, COMMAND_HDOT_SCR);
++ return Read_Parameter(display);
++}
++
++static unsigned short MinipugGetCursorAddress(unsigned int display)
++{
++ unsigned char lsb, msb;
++ Write_Command(display, COMMAND_CSRR);
++ lsb = Read_Parameter(display) & 0xff;
++ msb = (Read_Parameter(display) << 8) & 0xff00;
++ return msb | lsb;
++}
++
++static void MinipugSetGrayscale(unsigned int display, unsigned int bits_per_pixel)
++{
++ unsigned char byte;
++ Write_Command(display, COMMAND_GRAYSCALE);
++ switch (bits_per_pixel) {
++ default:
++ case 1:
++ byte = 0x00; break;
++ case 2:
++ byte = 0x01; break;
++ case 4:
++ byte = 0x02; break;
++ }
++ Write_Parameter(display, byte);
++ pr_debug("Greyscale Register[0x20] = 0x%x\n", byte);
++}
++
++static unsigned char MinipugGetGreyScale(unsigned int display)
++{
++ Write_Command(display, COMMAND_CSRR);
++ return Read_Parameter(display) & 0x03;
++}
++
++static void MinipugWriteString(unsigned int display, char *string)
++{
++ int p;
++
++ p = 0;
++ Write_Command(display, COMMAND_MEMWRITE);
++ while (string[p] != '\0')
++ Write_Parameter(display, string[p++]);
++}
++
++static void MinipugWriteMemoryByte(unsigned int display, BYTE value)
++{
++ Write_Command(display, COMMAND_MEMWRITE);
++ Write_Parameter(display, value);
++}
++
++static unsigned char MinipugReadMemoryByte(unsigned int display)
++{
++ Write_Command(display, COMMAND_MEMREAD);
++ return Read_Parameter(display);
++}
++
++static unsigned char Read_Parameter(unsigned int display)
++{
++ return 0;
++}
++
++static ssize_t minipug_read(struct file *, char *, size_t, loff_t *);
++static ssize_t minipug_write(struct file *, const char *, size_t, loff_t *);
++static int minipug_open(struct inode *, struct file *);
++static int minipug_release(struct inode *, struct file *);
++static int minipug_ioctl(struct inode *, struct file *, unsigned int, unsigned long);
++static int minipug_mmap(struct file *, struct vm_area_struct *vm);
++
++static struct file_operations minipug_fops = {
++ read: minipug_read,
++ write: minipug_write,
++ open: minipug_open,
++ release: minipug_release,
++ ioctl: minipug_ioctl,
++ mmap: minipug_mmap,
++};
++
++/* proc interface */
++static ssize_t proc_read_minipug(struct file *file, char *buf,
++ size_t nbytes, loff_t *ppos);
++static ssize_t proc_write_minipug(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos);
++
++static struct file_operations proc_minipug_operations = {
++ read: proc_read_minipug,
++ write: proc_write_minipug
++};
++static struct proc_dir_entry *proc_minipug;
++#define PROC_MINIPUG "minipug"
++
++static void minipugs_reset(void)
++{
++ samosa_write8(CPLD_LCD_CLR, 1 << CPLD_LCD_NRESET_BIT);
++ mdelay(1);
++ samosa_write8(CPLD_LCD_SET, 1 << CPLD_LCD_NRESET_BIT);
++ mdelay(3);
++}
++
++static void minipug_setup(int disp)
++{
++ MinipugInitDisplay(disp);
++ memset(minipug[disp].buffer, 0, RAM_SIZE);
++ minipug_update_graphics(disp, minipug[disp].buffer, RAM_SIZE, 0);
++}
++
++static int minipug_open(struct inode *inode, struct file *filp)
++{
++ struct minipug_dev *minipug_devp;
++
++#ifdef CONFIG_MINIPUG_ANIMATE
++ animate = 0;
++#endif
++ if (samosa_sm_present())
++ return -ENODEV;
++
++ minipug_devp = container_of(inode->i_cdev, struct minipug_dev, cdev);
++ filp->private_data = minipug_devp;
++
++ return 0;
++}
++
++static int minipug_release(struct inode *inode, struct file *filp)
++{
++ return 0;
++}
++
++static ssize_t minipug_read(struct file *filp, char *buf,
++ size_t size, loff_t *offp)
++{
++ struct minipug_dev *mp = (struct minipug_dev *)filp->private_data;
++ if (*offp >= RAM_SIZE-1)
++ return -EINVAL;
++ if (*offp+size > RAM_SIZE)
++ size = RAM_SIZE-*offp;
++ return copy_to_user(buf, &mp->buffer[*offp], size);
++}
++
++static ssize_t minipug_write(struct file *filp, const char *buf,
++ size_t size, loff_t *offp)
++{
++ struct minipug_dev *mp = (struct minipug_dev *)filp->private_data;
++ /* first RAM_SIZE address spaces are the frame buffer */
++ if (*offp < RAM_SIZE) {
++ unsigned long copied;
++ if (*offp+size > RAM_SIZE)
++ size = RAM_SIZE-*offp;
++ copied = copy_from_user(&mp->buffer[*offp], buf, size);
++ minipug_update_graphics(mp->display, mp->buffer + *offp, size, *offp);
++ return copied;
++ } else if (size == sizeof(unsigned int)) {
++ loff_t command = (*offp)-RAM_SIZE;
++ unsigned int arg;
++ unsigned long copied = copy_from_user(&arg, buf, sizeof(arg));
++ if (command == 0) {
++ if ((arg == 1) || (arg == 2) || (arg == 4)) {
++ mp->bpp = arg;
++ minipug_setup(mp->display);
++ }
++ }
++ return copied;
++ }
++ /* groups of double ints are display buffer update requests */
++ else if (size == (size / (sizeof(unsigned int)*2))*(sizeof(unsigned int)*2)) {
++ unsigned int offset;
++ unsigned int count;
++ size_t org_size = size;
++ while (size) {
++ unsigned long copied = copy_from_user(&offset, buf, sizeof(offset));
++ buf += sizeof(offset);
++ copied = copy_from_user(&count, buf, sizeof(count));
++ buf += sizeof(count);
++ if (offset >= RAM_SIZE)
++ pr_info("%s: ignoring, offset = 0x%x max = 0x%x\n", __func__, offset, RAM_SIZE-1);
++ else if (offset+count > RAM_SIZE)
++ pr_info("%s: ignoring, offset + count = 0x%x max = 0x%x\n", __func__, offset+count, RAM_SIZE-1);
++ else {
++ pr_debug("%s: updating offset %d count = %d on display %d\n", __func__, offset, count, mp->display);
++ minipug_update_graphics(mp->display, mp->buffer + offset, count, offset);
++ }
++ size -= sizeof(unsigned int)*2;
++ }
++ return org_size;
++ }
++ return -EINVAL;
++}
++
++/* maybe this will be handy in due course */
++static int minipug_ioctl(struct inode *inode, struct file *flip,
++ unsigned int command, unsigned long arg)
++{
++ int err;
++ err = -EINVAL;
++ return err;
++}
++
++static int minipug_mmap(struct file *filp, struct vm_area_struct *vma)
++{
++ struct minipug_dev *mp = (struct minipug_dev *)filp->private_data;
++
++ if (remap_vmalloc_range(vma, mp->buffer, 0)) {
++ pr_err("remap_pfn_range failed\n");
++ return -EAGAIN;
++ }
++ return 0;
++}
++
++static int proc_read_minipug(struct file *filp, char *buf,
++ size_t nbytes, loff_t *ppos)
++{
++ char outputbuf[512];
++ int count = 0;
++
++ /* all done in a single read */
++ if (*ppos > 0)
++ return 0;
++
++ count += sprintf(&outputbuf[count], "Minipug: major dev = %d\n", MAJOR(dev));
++ count += sprintf(&outputbuf[count], "Minipug %d: ready\n Bits per pixel %d\n",
++ minipug[0].display, minipug[0].bpp);
++ count += sprintf(&outputbuf[count], "Minipug %d: ready\n Bits per pixel %d\n",
++ minipug[1].display, minipug[1].bpp);
++
++ if (count > nbytes) /* Assume output can be read at one time */
++ return -EINVAL;
++ if (copy_to_user(buf, outputbuf, count))
++ return -EFAULT;
++ *ppos += count;
++ return count;
++}
++
++static ssize_t proc_write_minipug(struct file *filp, const char *buffer,
++ size_t count, loff_t *ppos)
++{
++ /* struct minipug_dev *mp= (struct minipug_dev *)filp->private_data;
++ * if (strncmp(buff,"reset:",6)==0)
++ * newRegValue = simple_strtoul(buffer,&endp,0);
++ * a bold but simple claim is to have read it all
++ */
++ return count;
++}
++
++
++/* driver initialisation */
++
++static int __init minipug_probe(struct samosa_device *pdev)
++{
++#ifndef CONFIG_BALLOON2_BUILD_TCL_PIKEY2
++ /* if smart media present - cpld cannot be so declare invalid */
++ if (samosa_sm_present()) {
++ dev_info(&pdev->dev, "%s: samosa bus not present\n", __func__);
++ return -ENODEV;
++ }
++#endif
++
++ if (!minipug_ready(pdev->id)) {
++ dev_info(&pdev->dev, "%s: minipug %d not ready\n", __func__, pdev->id);
++ return -ENODEV;
++ }
++
++ minipug_setup(pdev->id);
++
++#ifdef USE_GRAPHICS_TEST
++ MinipugSetCursorAddress(pdev->id, display_state[0].blocks[2].start);
++ MinipugBlockFill(pdev->id, 2, (BYTE)(20 & 0xff));
++ MinipugGraphicTest(pdev->id, 2);
++ /* MinipugTextTest(pdev->id, 1); */
++#endif
++
++ dev_info(&pdev->dev, "Minipug %d display support installed\n", pdev->id);
++
++ return 0;
++}
++
++static int __exit minipug_remove(struct samosa_device *dev)
++{
++ samosa_set_drvdata(dev, NULL);
++ return 0;
++}
++
++#ifdef CONFIG_PM
++static int minipug_suspend(struct samosa_device *dev, pm_message_t state)
++{
++ MinipugPowerSave(dev->id);
++ return 0;
++}
++
++static int minipug_resume(struct samosa_device *dev)
++{
++ MinipugExitPowerSave(dev->id);
++ minipug_update_graphics(dev->id, minipug[dev->id].buffer, RAM_SIZE, 0);
++ return 0;
++}
++#else /* CONFIG_PM */
++#define minipug_suspend NULL
++#define minipug_resume NULL
++#endif /* CONFIG_PM */
++
++#define minipug_shutdown NULL
++
++/* driver definition */
++static struct samosa_driver minipug_driver = {
++ .probe = minipug_probe,
++ .shutdown = minipug_shutdown,
++ .remove = __exit_p(minipug_remove),
++ .suspend = minipug_suspend,
++ .resume = minipug_resume,
++ .driver = {
++ .owner = THIS_MODULE,
++ .name = "minipug",
++ },
++};
++
++/* bus device */
++static struct samosa_device *minipug_device[2];
++
++/* class object */
++static struct class *minipug_class;
++
++static int __init minipug_init(void)
++{
++ int i;
++ int ret;
++
++ /* general initialisation */
++ spin_lock_init(&minipug_lock);
++
++ /* register a range of device nodes */
++ ret = alloc_chrdev_region(&dev, 0, 2, "minipug");
++
++ if (ret)
++ goto error;
++
++ /* create the minipug character devices */
++ for (i = 0; i < MINIPUG_DISPLAYS; i++) {
++ minipug[i].display = i;
++ minipug[i].bpp = DISPLAY_BPP;
++ minipug[i].buffer = (unsigned char *)vmalloc_user(BUFFER_SIZE);
++ if (!minipug[i].buffer) {
++ pr_err("%s: minipug %d not enough memory\n", __func__, i);
++ ret = -ENOMEM;
++ break;
++ }
++
++ /* initialise character device */
++ cdev_init(&minipug[i].cdev, &minipug_fops);
++ /* claim ownership */
++ minipug[i].cdev.owner = THIS_MODULE;
++ /* add character device */
++ ret = cdev_add(&minipug[i].cdev, dev + i, 1);
++ if (ret)
++ break;
++ }
++ if (ret) {
++ for (i = 0; i < MINIPUG_DISPLAYS; i++) {
++ if (minipug[i].buffer)
++ vfree(minipug[i].buffer);
++ kobject_put(&minipug[i].cdev.kobj);
++ }
++ goto error_region;
++ }
++
++ /* create the class and devices */
++ minipug_class = class_create(THIS_MODULE, "minipug");
++
++ for (i = 0; i < MINIPUG_DISPLAYS; i++) {
++ if (!device_create(minipug_class, NULL, (dev + i), NULL, "minipug%d", i))
++ goto error_class_device;
++ /* register the device on a bus. */
++ minipug_device[i] = samosa_device_register_simple("minipug", i);
++ if (!minipug_device[i])
++ goto error_bus;
++ }
++
++ /* create proc access to displays */
++ proc_minipug = create_proc_entry(PROC_MINIPUG, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_minipug)
++ proc_minipug->proc_fops = &proc_minipug_operations;
++
++ /* register the driver */
++ return samosa_driver_register(&minipug_driver);
++
++error_bus:
++ for (i = 0; i < MINIPUG_DISPLAYS; i++)
++ /* remove samosa device */
++ samosa_device_unregister(minipug_device[i]);
++error_class_device:
++ for (i = 0; i < MINIPUG_DISPLAYS; i++)
++ device_destroy(minipug_class, dev + i);
++error_region:
++ unregister_chrdev_region(dev, 2);
++error:
++ return ret;
++}
++
++static void __exit minipug_exit(void)
++{
++ int i;
++
++ /* remove proc entry */
++ remove_proc_entry(PROC_MINIPUG, NULL);
++
++ for (i = 0; i < MINIPUG_DISPLAYS; i++) {
++ /* remove class device */
++ device_destroy(minipug_class, (dev + i));
++
++ /* remove samosa device */
++ samosa_device_unregister(minipug_device[i]);
++
++ /* remove character device */
++ cdev_del(&minipug[i].cdev);
++
++ /* free buffer */
++ vfree(minipug[i].buffer);
++ }
++ /* remove driver */
++ samosa_driver_unregister(&minipug_driver);
++
++ /* unregister region */
++ unregister_chrdev_region(dev, 2);
++
++ /* remove class */
++ class_destroy(minipug_class);
++}
++
++module_init(minipug_init);
++module_exit(minipug_exit);
++
++MODULE_AUTHOR("Nick Bane <nick@cecomputing.co.uk>");
++MODULE_DESCRIPTION("Minipug display interface via samosa bus on Balloon");
++MODULE_LICENSE("GPL");
+Index: linux-2.6.31/include/video/minipug.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.31/include/video/minipug.h 2010-01-04 22:35:55.000000000 +0000
+@@ -0,0 +1,2 @@
++/* graphics display interface utility for Toby Churchill Minipug device */
++void minipug_update_graphics(unsigned int disp, unsigned char *data, unsigned int len, unsigned int offset);
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-minipugfb.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-minipugfb.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-minipugfb.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,500 @@
+Index: linux-2.6.31-rc4/drivers/video/Kconfig
+===================================================================
+--- linux-2.6.31-rc4.orig/drivers/video/Kconfig 2009-07-23 03:32:59.000000000 +0100
++++ linux-2.6.31-rc4/drivers/video/Kconfig 2009-07-24 10:40:32.000000000 +0100
+@@ -1818,6 +1818,28 @@
+
+ <file:Documentation/fb/pxafb.txt> describes the available parameters.
+
++config FB_MINIPUG
++ tristate "MINIPUG LCD framebuffer support"
++ depends on FB && ARCH_PXA
++ select FB_SYS_FILLRECT
++ select FB_SYS_COPYAREA
++ select FB_SYS_IMAGEBLIT
++ select FB_SYS_FOPS
++ select FB_DEFERRED_IO
++ select FB_CFB_FILLRECT
++ select FB_CFB_COPYAREA
++ select FB_CFB_IMAGEBLIT
++ ---help---
++ Frame buffer driver for the built-in LCD controller in the Toby
++ Churchill SL40 Lightwriters.
++
++ This driver is also available as a module ( = code which can be
++ inserted and removed from the running kernel whenever you want). The
++ module will be called minipugfb. If you want to compile it as a module,
++ say M here and read <file:Documentation/kbuild/modules.txt>.
++
++ If unsure, say N.
++
+ config FB_MBX
+ tristate "2700G LCD framebuffer support"
+ depends on FB && ARCH_PXA
+Index: linux-2.6.31-rc4/drivers/video/Makefile
+===================================================================
+--- linux-2.6.31-rc4.orig/drivers/video/Makefile 2009-07-23 03:32:59.000000000 +0100
++++ linux-2.6.31-rc4/drivers/video/Makefile 2009-07-24 10:41:25.000000000 +0100
+@@ -97,6 +97,7 @@
+ obj-$(CONFIG_FB_CIRRUS) += cirrusfb.o
+ obj-$(CONFIG_FB_ASILIANT) += asiliantfb.o
+ obj-$(CONFIG_FB_PXA) += pxafb.o
++obj-$(CONFIG_FB_MINIPUG) += minipugfb.o
+ obj-$(CONFIG_FB_PXA168) += pxa168fb.o
+ obj-$(CONFIG_FB_W100) += w100fb.o
+ obj-$(CONFIG_FB_TMIO) += tmiofb.o
+Index: linux-2.6.31-rc4/drivers/video/minipugfb.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.31-rc4/drivers/video/minipugfb.c 2009-07-24 10:40:32.000000000 +0100
+@@ -0,0 +1,450 @@
++/*
++ * linux/drivers/video/minipugfb.c -- FB driver for primary Minipug display
++ *
++ * Copyright (C) 2009, Nick Bane
++ * This work was derived from the hecuba driver layout
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file COPYING in the main directory of this archive for
++ * more details.
++ *
++ * Layout is based on skeletonfb.c by James Simmons and Geert Uytterhoeven.
++ *
++ *
++ */
++
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/errno.h>
++#include <linux/string.h>
++#include <linux/mm.h>
++#include <linux/slab.h>
++#include <linux/vmalloc.h>
++#include <linux/delay.h>
++#include <linux/interrupt.h>
++#include <linux/fb.h>
++#include <linux/init.h>
++#include <linux/platform_device.h>
++#include <linux/list.h>
++#include <linux/uaccess.h>
++
++#include "video/minipug.h"
++
++#define MINIPUG_W 456
++#define MINIPUG_H 80
++#define MINIPUGFB_BITS_PER_PIXEL 8
++
++/* main minipugfb functions */
++
++struct minipugfb_par {
++ int device;
++ unsigned char buffer[MINIPUG_W * MINIPUG_H /2];
++ struct fb_info *info;
++};
++
++static unsigned char getgrey8(unsigned char val) {
++ unsigned char red = val & 0xa0;
++ unsigned char green = (val & 0x38) << 2;
++ unsigned char blue = (val & 0x7) << 5;
++ return (red + green + blue) / 3;
++}
++
++static unsigned char getgrey16(u16 val) {
++ unsigned char red = val & 0x7800;
++ unsigned char green = (val & 0x7e0) << 5;
++ unsigned char blue = (val & 0x1f) << 11;
++ return (red + green + blue) / 3;
++}
++
++static unsigned char getgrey32(u32 val) {
++ unsigned char red = (val & 0xff0000) >> 16;
++ unsigned char green = (val & 0xff00) >> 8;
++ unsigned char blue = (val & 0xff);
++ return ((red + green + blue) / 3);
++}
++
++static void minipugfb_dpy_update(struct minipugfb_par *par)
++{
++ int x, y;
++ unsigned char *mpptr = &par->buffer[0];
++ // 8 bit?
++ if (par->info->var.bits_per_pixel == 8) {
++ unsigned char *monoptr8 = (unsigned char __force *)par->info->screen_base;
++ for (y = 0; y < MINIPUG_H; y++) {
++ for (x = 0; x < MINIPUG_W; x += 2)
++ mpptr[x / 2] = (getgrey8(monoptr8[x]) & 0xf0) | ((getgrey8(monoptr8[x + 1]) & 0xf0) >> 4);
++ mpptr += MINIPUG_W / 2;
++ monoptr8 += MINIPUG_W;
++ }
++ }
++ else if (par->info->var.bits_per_pixel == 16) {
++ u16 *monoptr16 = (unsigned short __force *)par->info->screen_base;
++ for (y = 0; y < MINIPUG_H; y++) {
++ for (x = 0; x < MINIPUG_W; x += 2)
++ mpptr[x / 2] = (getgrey16(monoptr16[x]) & 0xf0) | ((getgrey16(monoptr16[x + 1]) & 0xf0) >> 4);
++ mpptr += MINIPUG_W / 2;
++ monoptr16 += MINIPUG_W;
++ }
++ }
++ // else 32 bit
++ else {
++ u32 *monoptr32 = (unsigned int __force *)par->info->screen_base;
++ for (y = 0; y < MINIPUG_H; y++) {
++ for (x = 0; x < MINIPUG_W; x += 2)
++ mpptr[x / 2] = (getgrey32(monoptr32[x]) & 0xf0) | ((getgrey32(monoptr32[x + 1]) & 0xf0) >> 4);
++ mpptr += MINIPUG_W / 2;
++ monoptr32 += MINIPUG_W;
++ }
++ }
++ minipug_update_graphics(par->device, &par->buffer[0], (sizeof par->buffer), 0);
++}
++
++/* this is called back from the deferred io workqueue */
++static void minipugfb_dpy_deferred_io(struct fb_info *info,
++ struct list_head *pagelist)
++{
++ minipugfb_dpy_update(info->par);
++}
++
++static void minipugfb_fillrect(struct fb_info *info,
++ const struct fb_fillrect *rect)
++{
++ struct minipugfb_par *par = info->par;
++
++ sys_fillrect(info, rect);
++
++ minipugfb_dpy_update(par);
++}
++
++static void minipugfb_copyarea(struct fb_info *info,
++ const struct fb_copyarea *area)
++{
++ struct minipugfb_par *par = info->par;
++
++ sys_copyarea(info, area);
++
++ minipugfb_dpy_update(par);
++}
++
++static void minipugfb_imageblit(struct fb_info *info,
++ const struct fb_image *image)
++{
++ struct minipugfb_par *par = info->par;
++
++ sys_imageblit(info, image);
++
++ minipugfb_dpy_update(par);
++}
++
++static ssize_t minipugfb_write(struct fb_info *info, const char __user *buf,
++ size_t count, loff_t *ppos)
++{
++ unsigned long p;
++ int err=-EINVAL;
++ struct minipugfb_par *par;
++ unsigned int xres;
++ unsigned int fbmemlength;
++
++ p = *ppos;
++ par = info->par;
++ xres = info->var.xres;
++ fbmemlength = info->fix.smem_len;
++
++ if (p > fbmemlength) {
++ return -EFBIG;
++ }
++
++ err = 0;
++ if (count > fbmemlength) {
++ err = -EFBIG;
++ count = fbmemlength;
++ }
++
++ if ((count + p) > fbmemlength)
++ count = fbmemlength - p;
++
++ if (count && !err) {
++ char *base_addr;
++
++ base_addr = (char __force *)info->screen_base;
++
++ if (copy_from_user(base_addr + p, buf, count))
++ err = -EFAULT;
++
++ if (!err)
++ *ppos += count;
++
++ }
++
++ minipugfb_dpy_update(par);
++
++ return err ? err : count;
++
++}
++
++static int
++minipugfb_set_par(struct fb_info *info)
++{
++ struct fb_var_screeninfo *var = &info->var;
++// unsigned long palette_mem_size;
++
++ if (var->bits_per_pixel == 16)
++ info->fix.visual = FB_VISUAL_TRUECOLOR;
++// else if (!fbi->cmap_static)
++// info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
++ else {
++ /*
++ * Some people have weird ideas about wanting static
++ * pseudocolor maps. I suspect their user space
++ * applications are broken.
++ */
++ info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
++ }
++ switch (var->bits_per_pixel) {
++ case 8 :
++// info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
++ var->red.offset = 3; var->red.length = 2;
++ var->green.offset = 3; var->green.length = 3;
++ var->blue.offset = 0; var->blue.length = 3;
++ var->transp.offset = var->transp.length = 0;
++ break;
++ case 16 :
++// info->fix.visual = FB_VISUAL_TRUECOLOR;
++ var->red.offset = 11; var->red.length = 5;
++ var->green.offset = 5; var->green.length = 6;
++ var->blue.offset = 0; var->blue.length = 5;
++ var->transp.offset = var->transp.length = 0;
++ break;
++ case 32 :
++// info->fix.visual = FB_VISUAL_TRUECOLOR;
++ var->red.offset = 16; var->red.length = 8;
++ var->green.offset = 8; var->green.length = 8;
++ var->blue.offset = 0; var->blue.length = 8;
++ var->transp.offset = var->transp.length = 0;
++ break;
++ default :
++ return -EINVAL;
++ break;
++ }
++
++ if (var->bits_per_pixel != 8)
++ fb_dealloc_cmap(&info->cmap);
++ else
++ fb_alloc_cmap(&info->cmap, 1<<info->var.bits_per_pixel, 0);
++
++ return 0;
++}
++
++static int
++minipugfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
++{
++ return 0;
++}
++
++static int
++minipugfb_setcolreg(unsigned int color_index, unsigned int red, unsigned int green,
++ unsigned int blue, unsigned int transp, struct fb_info *info)
++{
++ u32 *palette = info->pseudo_palette;
++
++ if (color_index >= info->cmap.len)
++ return -EINVAL;
++
++ if (info->var.grayscale) {
++ /* Convert color to grayscale.
++ * grayscale = 0.30*R + 0.59*G + 0.11*B */
++ red = green = blue =
++ (red * 77 + green * 151 + blue * 28 + 127) >> 8;
++ }
++
++ switch (info->fix.visual) {
++ case FB_VISUAL_PSEUDOCOLOR :
++ case FB_VISUAL_STATIC_PSEUDOCOLOR :
++ break;
++ case FB_VISUAL_TRUECOLOR :
++ // reduce colour depth
++ red >>= 16 - info->var.red.length;
++ green >>= 16 - info->var.green.length;
++ blue >>= 16 - info->var.blue.length;
++ palette[color_index] =
++ (red << info->var.red.offset) |
++ (green << info->var.green.offset) |
++ (blue << info->var.blue.offset);
++ break;
++ default :
++ break;
++ }
++ return 0;
++}
++
++static struct fb_fix_screeninfo minipugfb_fix __devinitdata = {
++ .id = "minipugfb",
++ .type = FB_TYPE_PACKED_PIXELS,
++// .visual = FB_VISUAL_TRUECOLOR,
++// .visual = FB_VISUAL_STATIC_PSEUDOCOLOR,
++// .visual = FB_VISUAL_PSEUDOCOLOR,
++ .xpanstep = 0,
++ .ypanstep = 0,
++ .ywrapstep = 0,
++ .accel = FB_ACCEL_NONE,
++};
++
++static struct fb_var_screeninfo minipugfb_var __devinitdata = {
++ .xres = MINIPUG_W,
++ .yres = MINIPUG_H,
++ .xres_virtual = MINIPUG_W,
++ .yres_virtual = MINIPUG_H,
++ .bits_per_pixel = MINIPUGFB_BITS_PER_PIXEL,
++ .grayscale = 1,
++};
++
++static struct fb_ops minipugfb_ops = {
++ .owner = THIS_MODULE,
++ .fb_check_var = minipugfb_check_var,
++ .fb_set_par = minipugfb_set_par,
++ .fb_setcolreg = minipugfb_setcolreg,
++ .fb_read = fb_sys_read,
++ .fb_write = minipugfb_write,
++ .fb_fillrect = minipugfb_fillrect,
++ .fb_copyarea = minipugfb_copyarea,
++ .fb_imageblit = minipugfb_imageblit,
++};
++
++static struct fb_deferred_io minipugfb_defio = {
++ .delay = HZ/4,
++ .deferred_io = minipugfb_dpy_deferred_io,
++};
++
++static int __devinit minipugfb_probe(struct platform_device *dev)
++{
++ struct fb_info *info;
++ int retval = -ENOMEM;
++ int videomemorysize;
++ unsigned char *videomemory;
++ struct minipugfb_par *par;
++ int i;
++
++ // make sure we have enough for 32 bits per pixel
++ videomemorysize = MINIPUG_W * MINIPUG_H * 4;
++
++ if (!(videomemory = vmalloc(videomemorysize)))
++ return retval;
++
++ memset(videomemory, 0, videomemorysize);
++
++ info = framebuffer_alloc(sizeof(struct minipugfb_par), &dev->dev);
++ if (!info)
++ goto err;
++
++ info->screen_base = (char __iomem *) videomemory;
++ info->fbops = &minipugfb_ops;
++
++ info->var = minipugfb_var;
++ info->fix = minipugfb_fix;
++ info->fix.smem_start = (unsigned long)videomemorysize;
++ info->fix.smem_len = videomemorysize;
++ info->fix.line_length = MINIPUG_W;
++ info->flags = FBINFO_FLAG_DEFAULT;
++ par = info->par;
++ par->info = info;
++ par->device = dev->id;
++
++ info->fbdefio = &minipugfb_defio;
++ fb_deferred_io_init(info);
++
++ retval = fb_alloc_cmap(&info->cmap, 16, 0);
++ if (retval < 0)
++ goto err_fb;
++
++ // set red green blue colour depths
++ minipugfb_check_var(&info->var,info);
++ minipugfb_set_par(info);
++
++ retval = register_framebuffer(info);
++ if (retval < 0)
++ goto err_cmap;
++ platform_set_drvdata(dev, info);
++
++ printk(KERN_INFO
++ "fb%d: Minipug frame buffer device, using %dK of video memory\n",
++ info->node, videomemorysize >> 10);
++
++ return 0;
++
++err_cmap:
++ fb_dealloc_cmap(&info->cmap);
++err_fb:
++ framebuffer_release(info);
++err:
++ vfree(videomemory);
++ return retval;
++}
++
++static int __devexit minipugfb_remove(struct platform_device *dev)
++{
++ struct fb_info *info = platform_get_drvdata(dev);
++
++ if (info) {
++ fb_deferred_io_cleanup(info);
++ unregister_framebuffer(info);
++ vfree((void __force *)info->screen_base);
++ framebuffer_release(info);
++ }
++ return 0;
++}
++
++static struct platform_driver minipugfb_driver = {
++ .probe = minipugfb_probe,
++ .remove = minipugfb_remove,
++ .driver = {
++ .name = "minipugfb",
++ },
++};
++
++static struct platform_device *minipugfb0_device;
++static struct platform_device *minipugfb1_device;
++
++static int __init minipugfb_init(void)
++{
++ int ret;
++
++ ret = platform_driver_register(&minipugfb_driver);
++ if (!ret) {
++ minipugfb0_device = platform_device_alloc("minipugfb", 0);
++ if (minipugfb0_device) {
++ ret = platform_device_add(minipugfb0_device);
++ if (!ret) {
++ minipugfb1_device = platform_device_alloc("minipugfb", 1);
++ if (minipugfb1_device)
++ ret = platform_device_add(minipugfb1_device);
++ else
++ ret = -ENOMEM;
++ }
++ }
++ else
++ ret = -ENOMEM;
++
++ if (ret) {
++ platform_device_put(minipugfb0_device);
++ platform_device_put(minipugfb1_device);
++ platform_driver_unregister(&minipugfb_driver);
++ }
++ }
++ return ret;
++
++}
++
++static void __exit minipugfb_exit(void)
++{
++ platform_device_unregister(minipugfb0_device);
++ platform_device_unregister(minipugfb1_device);
++ platform_driver_unregister(&minipugfb_driver);
++}
++
++module_init(minipugfb_init);
++module_exit(minipugfb_exit);
++
++MODULE_DESCRIPTION("fbdev defio driver for Minipug display");
++MODULE_AUTHOR("Nick Bane");
++MODULE_LICENSE("GPL");
++
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-nand.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-nand.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-nand.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,341 @@
+Balloon3 nand support
+
+from: Nick Bane <nick@cecomputing.co.uk>
+
+Signed-off-by: Wookey <wookey@wookware.org>
+
+Index: drivers/mtd/nand/Makefile
+===================================================================
+--- drivers/mtd/nand/Makefile.orig 2010-08-22 22:21:59.000000000 +0100
++++ drivers/mtd/nand/Makefile 2010-08-22 22:23:05.000000000 +0100
+@@ -32,6 +32,7 @@
+ obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o
+ obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o
+ obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
++obj-$(CONFIG_MTD_NAND_BALLOON3) += balloon3.o
+ obj-$(CONFIG_MTD_ALAUDA) += alauda.o
+ obj-$(CONFIG_MTD_NAND_PASEMI) += pasemi_nand.o
+ obj-$(CONFIG_MTD_NAND_ORION) += orion_nand.o
+Index: drivers/mtd/nand/Kconfig
+===================================================================
+--- drivers/mtd/nand/Kconfig.orig 2010-08-22 22:21:59.000000000 +0100
++++ drivers/mtd/nand/Kconfig 2010-08-22 22:23:05.000000000 +0100
+@@ -425,6 +425,10 @@
+ Support for NAND flash connected to a Toshiba Mobile IO
+ Controller in some PDAs, including the Sharp SL6000x.
+
++config MTD_NAND_BALLOON3
++ tristate "Support for NAND Flash on Balloon3 board"
++ depends on MTD_NAND && MACH_BALLOON3
++
+ config MTD_NAND_NANDSIM
+ tristate "Support for NAND Flash Simulator"
+ depends on MTD_PARTITIONS
+Index: drivers/mtd/nand/balloon3.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ drivers/mtd/nand/balloon3.c 2010-08-22 22:23:05.000000000 +0100
+@@ -0,0 +1,274 @@
++/*
++ * linux/drivers/mtd/nand/balloon3.c
++ *
++ * Author: Nick Bane
++ * Created: June, 2006
++ * Copyright: Toby Churchill Ltd
++ * Derived from drivers/mtd/nand/sharpsl.c
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#include <linux/slab.h>
++#include <linux/module.h>
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/io.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/nand.h>
++#include <linux/mtd/partitions.h>
++#include <mach/hardware.h>
++
++#include <mach/pxa27x.h>
++#include <mach/balloon3.h>
++
++/* option to ioremap in two small ranges */
++#define SPLIT_RANGE
++
++#ifdef SPLIT_RANGE
++/* FIXME - unsure which to use, a word or a block */
++#define SPLIT_RANGE_SIZE 0x1000
++/* #define SPLIT_RANGE_SIZE 4 */
++
++#define balloon3_phys_ctl_base (BALLOON3_NANDIO_PHYS + BALLOON3_NANDIO_CTL_OFFSET)
++#define balloon3_phys_io_base (BALLOON3_NANDIO_PHYS + BALLOON3_NANDIO_IO_OFFSET)
++static void __iomem *balloon3_io_base =
++ (void __iomem *)(BALLOON3_NANDIO_VIRT + BALLOON3_NANDIO_IO_OFFSET);
++#define FLASHIO balloon3_io_base /* Flash I/O */
++
++#else
++#define balloon3_phys_nand_base (BALLOON3_NANDIO_PHYS)
++static void __iomem *balloon3_nand_base =
++ (void __iomem *)(BALLOON3_NANDIO_VIRT);
++#define FLASHIO ((balloon3_nand_base)+BALLOON3_NANDIO_IO_OFFSET) /* Flash I/O */
++#endif
++
++/* Flash control bits */
++#define FLWP (1 << 7)
++#define FLCE3 (1 << 5)
++#define FLCE2 (1 << 4)
++#define FLCE1 (1 << 3)
++#define FLCE0 (1 << 2)
++#define FLALE (1 << 1)
++#define FLCLE (1 << 0)
++
++/*
++ * MTD structure for Balloon3
++ */
++static struct mtd_info *balloon3_mtd;
++
++/*
++ * Define partitions for flash device
++ */
++#define DEFAULT_NUM_PARTITIONS 2
++
++static int nr_partitions;
++static struct mtd_partition balloon3_nand_default_partition_info[] = {
++ {
++ .name = "boot",
++ .offset = 0,
++ .size = 4 * 1024 * 1024,
++ },
++ {
++ .name = "rootfs",
++ .offset = MTDPART_OFS_APPEND,
++ .size = MTDPART_SIZ_FULL,
++ },
++};
++
++static void
++balloon3_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
++{
++ struct nand_chip *this = mtd->priv;
++ __raw_readsb(this->IO_ADDR_R, buf, len);
++}
++
++static void
++balloon3_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
++{
++ struct nand_chip *this = mtd->priv;
++ __raw_writesb(this->IO_ADDR_W, buf, len);
++}
++
++/*
++ * Hardware specific access to control-lines
++ */
++static void
++balloon3_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
++{
++ struct nand_chip *this = mtd->priv;
++
++ if (ctrl & NAND_CTRL_CHANGE) {
++ unsigned char set_ctl = 0;
++ unsigned char clear_ctl = 0;
++
++ if (ctrl & NAND_CLE)
++ set_ctl = FLCLE;
++ else
++ clear_ctl = FLCLE;
++ if (ctrl & NAND_ALE)
++ set_ctl |= FLALE;
++ else
++ clear_ctl |= FLALE;
++
++ if (clear_ctl)
++ __raw_writel(clear_ctl, BALLOON3_NAND_CONTROL_CLR_REG);
++ if (set_ctl)
++ __raw_writel(set_ctl, BALLOON3_NAND_CONTROL_SET_REG);
++ }
++ if (cmd != NAND_CMD_NONE)
++ writeb(cmd, this->IO_ADDR_W);
++}
++
++#ifdef CONFIG_MTD_PARTITIONS
++const char *part_probes[] = { "cmdlinepart", NULL };
++#endif
++
++void
++balloon3_nand_select_chip(struct mtd_info *mtd, int chip)
++{
++ /* deselect all chips */
++ __raw_writel((FLCE0 | FLCE1 | FLCE2 | FLCE3), BALLOON3_NAND_CONTROL_SET_REG);
++ /* do chip select as required */
++ switch (chip) {
++ case -1:
++ break;
++ case 0:
++ __raw_writel(FLCE0, BALLOON3_NAND_CONTROL_CLR_REG); break;
++ case 1:
++ __raw_writel(FLCE1, BALLOON3_NAND_CONTROL_CLR_REG); break;
++ case 2:
++ __raw_writel(FLCE2, BALLOON3_NAND_CONTROL_CLR_REG); break;
++ case 3:
++ __raw_writel(FLCE3, BALLOON3_NAND_CONTROL_CLR_REG); break;
++ }
++}
++
++static int balloon3_nand_dev_ready(struct mtd_info *mtd)
++{
++ unsigned char status = __raw_readl(BALLOON3_NAND_STATUS_REG);
++ return (BALLOON3_NAND_RNB & status) ? 1 : 0;
++}
++
++/*
++ * Main initialization routine
++ */
++int __init
++balloon3_nand_init(void)
++{
++ struct nand_chip *this;
++ struct mtd_partition *balloon3_partition_info;
++
++ /* Allocate memory for MTD device structure and private data */
++ balloon3_mtd = kmalloc(sizeof(struct mtd_info) +
++ sizeof(struct nand_chip), GFP_KERNEL);
++ if (!balloon3_mtd) {
++ pr_err("Unable to allocate Balloon3 NAND MTD device structure\n");
++ return -ENOMEM;
++ }
++
++ balloon3_mtd->owner = THIS_MODULE;
++
++#ifdef SPLIT_RANGE
++ /* map physical io address */
++ balloon3_io_base = ioremap(balloon3_phys_io_base, SPLIT_RANGE_SIZE);
++ if (!balloon3_io_base) {
++ pr_err("ioremap to access Balloon3 NAND chip io failed\n");
++ kfree(balloon3_mtd);
++ return -EIO;
++ }
++#else
++ balloon3_nand_base = ioremap(balloon3_phys_nand_base, NANDIO_LENGTH);
++ if (!balloon3_nand_base) {
++ pr_err("ioremap to access Balloon3 NAND chip io failed\n");
++ kfree(balloon3_mtd);
++ return -EIO;
++ }
++#endif
++
++ /* Get pointer to private data */
++ this = (struct nand_chip *) (&balloon3_mtd[1]);
++
++ /* Initialize structures */
++ memset((char *) balloon3_mtd, 0, sizeof(struct mtd_info));
++ memset((char *) this, 0, sizeof(struct nand_chip));
++
++ /* Link the private data with the MTD structure */
++ balloon3_mtd->priv = this;
++
++ /* initialise lines */
++ /* we don't set plait for the 8-bit bus nand chips, already set up by the bootldr */
++ __raw_writel((FLCE0 | FLCE1 | FLCE2 | FLCE3 | FLWP), BALLOON3_NAND_CONTROL_SET_REG);
++
++ /* initialise mtd nand i/o */
++ this->IO_ADDR_R = FLASHIO;
++ this->IO_ADDR_W = FLASHIO;
++ this->dev_ready = balloon3_nand_dev_ready;
++ this->read_buf = balloon3_nand_read_buf;
++ this->write_buf = balloon3_nand_write_buf;
++ this->cmd_ctrl = balloon3_nand_hwcontrol;
++ this->select_chip = balloon3_nand_select_chip;
++
++ /* 20 us command delay time */
++ /* empirical increase needed for 2K nand it seems */
++ this->chip_delay = 50;
++ this->ecc.mode = NAND_ECC_SOFT;
++
++ /* Scan to find existence of the device */
++ if (nand_scan(balloon3_mtd, 4)) {
++#ifdef SPLIT_RANGE
++ iounmap(balloon3_io_base);
++#else
++ iounmap(balloon3_nand_base);
++#endif
++ kfree(balloon3_mtd);
++ return -ENXIO;
++ }
++
++ /* Register the partitions */
++ balloon3_mtd->name = "balloon3-nand";
++
++#ifdef CONFIG_MTD_PARTITIONS
++ nr_partitions = parse_mtd_partitions(balloon3_mtd, part_probes,
++ &balloon3_partition_info, 0);
++#else
++ nr_partitions = 0;
++#endif
++ if (nr_partitions <= 0) {
++ nr_partitions = DEFAULT_NUM_PARTITIONS;
++ balloon3_partition_info = balloon3_nand_default_partition_info;
++ }
++
++ add_mtd_partitions(balloon3_mtd, balloon3_partition_info,
++ nr_partitions);
++
++ /* Return happy */
++ return 0;
++}
++module_init(balloon3_nand_init);
++
++/*
++ * Clean up routine
++ */
++static void __exit balloon3_nand_cleanup(void)
++{
++ /* Release resources, unregister device */
++ nand_release(balloon3_mtd);
++
++#ifdef SPLIT_RANGE
++ iounmap(balloon3_io_base);
++#else
++ iounmap(balloon3_nand_base);
++#endif
++
++ /* Free the MTD device structure */
++ kfree(balloon3_mtd);
++}
++module_exit(balloon3_nand_cleanup);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Nick Bane <nick@cecomputing.co.uk>");
++MODULE_DESCRIPTION("Device specific logic for NAND flash on Balloon3 board");
+Index: arch/arm/mach-pxa/include/mach/balloon3.h
+===================================================================
+--- arch/arm/mach-pxa/include/mach/balloon3.h.orig 2010-08-22 22:21:59.000000000 +0100
++++ arch/arm/mach-pxa/include/mach/balloon3.h 2010-08-22 22:23:36.000000000 +0100
+@@ -103,6 +103,15 @@
+ /* backlight control */
+ #define BALLOON3_GPIO_RUN_BACKLIGHT (99)
+
++/* add this for balloon3 nand-driver - FIXME driver needs to use above style*/
++#define BALLOON3_NANDIO_PHYS BALLOON3_FPGA_PHYS
++#define BALLOON3_NANDIO_VIRT BALLOON3_FPGA_VIRT
++#define BALLOON3_NANDIO_IO_OFFSET 0x00e00000
++#define BALLOON3_NANDIO_CTL2_OFFSET 0x00e00010
++#define BALLOON3_NANDIO_CTL_OFFSET 0x00e00014
++
++#define BALLOON3_NAND_RNB (1 << 0)
++
+ #define BALLOON3_GPIO_S0_CD (105)
+
+ /* NAND */
+@@ -112,7 +121,7 @@
+ #define BALLOON3_GPIO_RUN_232 (22)
+
+ /* NAND power */
+-+#define BALLOON3_GPIO_RUN_NAND (102)
++#define BALLOON3_GPIO_RUN_NAND (102)
+
+ /* SAMOSA power */
+ #define BALLOON3_GPIO_RUN_SAMOSA (101)
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-pcmcia.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-pcmcia.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-pcmcia.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,256 @@
+Balloon3 PCMCIA support for CF slot (where fitted)
+
+In theory 2 sockets could be fitted and supported but no such hardware has been built
+
+from: Nick Bane <nick@cecomputing.co.uk>
+
+Signed-off-by: Wookey <wookey@wookware.org>
+
+Index: linux-2.6.34/drivers/pcmcia/pxa2xx_balloon3.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.34/drivers/pcmcia/pxa2xx_balloon3.c 2010-06-07 07:47:37.000000000 +0100
+@@ -0,0 +1,205 @@
++/*
++ * linux/drivers/pcmcia/pxa2xx_balloon3.c
++ *
++ * Balloon3 PCMCIA specific routines.
++ *
++ * Author: Nick Bane
++ * Created: June, 2006
++ * Copyright: Toby Churchill Ltd
++ * Derived from pxa2xx_mainstone.c, by Nico Pitre
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#include <linux/module.h>
++#include <linux/gpio.h>
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/errno.h>
++#include <linux/interrupt.h>
++#include <linux/platform_device.h>
++
++#include <pcmcia/ss.h>
++
++#include <mach/hardware.h>
++#include <asm/irq.h>
++
++#include <mach/balloon3.h>
++#include <mach/mfp-pxa27x.h>
++#include <mach/pxa27x.h>
++
++#include <asm/io.h>
++
++
++#include "soc_common.h"
++
++/* #define FAKE_STATUS */
++
++/*
++ * These are a list of interrupt sources that provokes a polled
++ * check of status
++ */
++static struct pcmcia_irqs irqs[] = {
++ { 0, BALLOON3_S0_CD_IRQ, "PCMCIA0 CD" },
++ { 0, BALLOON3_BP_NSTSCHG_IRQ, "PCMCIA0 STSCHG" },
++};
++
++static unsigned long balloon3_pcmcia_pin_config[] = {
++ /* PC Card */
++ GPIO48_nPOE,
++ GPIO49_nPWE,
++ GPIO50_nPIOR,
++ GPIO51_nPIOW,
++ GPIO85_nPCE_1,
++ GPIO54_nPCE_2,
++ GPIO79_PSKTSEL,
++ GPIO55_nPREG,
++ GPIO56_nPWAIT,
++ GPIO57_nIOIS16,
++};
++
++static int balloon3_pcmcia_hw_init(struct soc_pcmcia_socket *skt)
++{
++ /*
++ * Setup default state of GPIO outputs
++ * before we enable them as outputs.
++ */
++ pxa2xx_mfp_config(balloon3_pcmcia_pin_config,
++ ARRAY_SIZE(balloon3_pcmcia_pin_config));
++
++ skt->socket.pci_irq = BALLOON3_BP_CF_NRDY_IRQ;
++
++ dev_info(&skt->socket.dev,
++ "%s: socket irq is %d, requesting status change irqs\n",
++ __func__, skt->socket.pci_irq);
++
++ return soc_pcmcia_request_irqs(skt, irqs, ARRAY_SIZE(irqs));
++}
++
++static void balloon3_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt)
++{
++ soc_pcmcia_free_irqs(skt, irqs, ARRAY_SIZE(irqs));
++}
++
++static unsigned long balloon3_pcmcia_status[2] = {
++ BALLOON3_PCMCIA_nSTSCHG_BVD1,
++ BALLOON3_PCMCIA_nSTSCHG_BVD1
++};
++
++static void balloon3_pcmcia_socket_state(struct soc_pcmcia_socket *skt,
++ struct pcmcia_state *state)
++{
++#ifdef FAKE_STATUS
++ state->detect = 0;
++ state->ready = 1;
++ state->bvd1 = 0;
++ state->bvd2 = 0;
++ state->vs_3v = 1;
++ state->vs_Xv = 0;
++ state->wrprot = 0; /* not available */
++#else
++ unsigned long status, flip;
++
++ status = __raw_readl(BALLOON3_CF_STATUS_REG);
++ flip = (status ^ balloon3_pcmcia_status[skt->nr])
++ & BALLOON3_PCMCIA_nSTSCHG_BVD1;
++
++ /*
++ * Workaround for STSCHG which can't be deasserted:
++ * We therefore disable/enable corresponding IRQs
++ * as needed to avoid IRQ locks.
++ */
++ if (flip) {
++ balloon3_pcmcia_status[skt->nr] = status;
++ if (status & BALLOON3_PCMCIA_nSTSCHG_BVD1)
++ enable_irq(BALLOON3_BP_NSTSCHG_IRQ);
++ else
++ disable_irq(BALLOON3_BP_NSTSCHG_IRQ);
++ }
++
++ state->detect = (GPLR(BALLOON3_GPIO_S0_CD) & GPIO_bit(BALLOON3_GPIO_S0_CD)) ? 0 : 1;
++ state->ready = (status & BALLOON3_PCMCIA_nIRQ) ? 1 : 0;
++ state->bvd1 = (status & BALLOON3_PCMCIA_nSTSCHG_BVD1) ? 1 : 0;
++ state->bvd2 = 0; /* not available */
++ state->vs_3v = 1; /* Always true its a CF card */
++ state->vs_Xv = 0; /* not available */
++ state->wrprot = 0; /* not available */
++#endif
++}
++
++static int balloon3_pcmcia_configure_socket(struct soc_pcmcia_socket *skt,
++ const socket_state_t *state)
++{
++ unsigned long power = 0;
++ int ret = 0;
++
++ if (state->flags & SS_RESET)
++ power |= BALLOON3_PCMCIA_RESET;
++
++ switch (skt->nr) {
++ case 0:
++ if (state->flags & SS_RESET)
++ __raw_writel(BALLOON3_PCMCIA_RESET,BALLOON3_CF_CONTROL_SET_REG);
++ else
++ __raw_writel(BALLOON3_PCMCIA_RESET,BALLOON3_CF_CONTROL_CLR_REG);
++ break;
++ default:
++ ret = -1;
++ }
++
++ return ret;
++}
++
++static void balloon3_pcmcia_socket_init(struct soc_pcmcia_socket *skt)
++{
++ dev_info(&skt->socket.dev, "%s: socket %d initialised\n", __func__, skt->nr);
++}
++
++static void balloon3_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt)
++{
++}
++
++static struct pcmcia_low_level balloon3_pcmcia_ops = {
++ .owner = THIS_MODULE,
++ .hw_init = balloon3_pcmcia_hw_init,
++ .hw_shutdown = balloon3_pcmcia_hw_shutdown,
++ .socket_state = balloon3_pcmcia_socket_state,
++ .configure_socket = balloon3_pcmcia_configure_socket,
++ .socket_init = balloon3_pcmcia_socket_init,
++ .socket_suspend = balloon3_pcmcia_socket_suspend,
++ .nr = 1,
++};
++
++static struct platform_device *balloon3_pcmcia_device;
++
++static int __init balloon3_pcmcia_init(void)
++{
++ int ret;
++
++ balloon3_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1);
++ if (!balloon3_pcmcia_device)
++ return -ENOMEM;
++
++ balloon3_pcmcia_device->dev.platform_data = &balloon3_pcmcia_ops;
++
++ ret = platform_device_add(balloon3_pcmcia_device);
++
++ if (ret)
++ platform_device_put(balloon3_pcmcia_device);
++
++ return ret;
++}
++
++static void __exit balloon3_pcmcia_exit(void)
++{
++ platform_device_unregister(balloon3_pcmcia_device);
++}
++
++fs_initcall(balloon3_pcmcia_init);
++module_exit(balloon3_pcmcia_exit);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Nick Bane <nick@cecomputing.co.uk>");
++MODULE_DESCRIPTION("Balloon3 board CF/PCMCIA driver");
+Index: linux-2.6.34/drivers/pcmcia/Makefile
+===================================================================
+--- linux-2.6.34.orig/drivers/pcmcia/Makefile 2010-06-07 07:20:05.000000000 +0100
++++ linux-2.6.34/drivers/pcmcia/Makefile 2010-06-07 07:21:43.000000000 +0100
+@@ -57,6 +57,7 @@
+ pxa2xx_cm_x2xx_cs-y += pxa2xx_cm_x2xx.o pxa2xx_cm_x255.o pxa2xx_cm_x270.o
+ pxa2xx-obj-$(CONFIG_ARCH_LUBBOCK) += pxa2xx_lubbock_cs.o
+ pxa2xx-obj-$(CONFIG_MACH_MAINSTONE) += pxa2xx_mainstone.o
++pxa2xx-obj-$(CONFIG_MACH_BALLOON3) += pxa2xx_balloon3.o
+ pxa2xx-obj-$(CONFIG_PXA_SHARPSL) += pxa2xx_sharpsl.o
+ pxa2xx-obj-$(CONFIG_MACH_ARMCORE) += pxa2xx_cm_x2xx_cs.o
+ pxa2xx-obj-$(CONFIG_ARCOM_PCMCIA) += pxa2xx_viper.o
+Index: linux-2.6.34/drivers/pcmcia/Kconfig
+===================================================================
+--- linux-2.6.34.orig/drivers/pcmcia/Kconfig 2010-06-07 07:20:05.000000000 +0100
++++ linux-2.6.34/drivers/pcmcia/Kconfig 2010-06-07 07:21:43.000000000 +0100
+@@ -234,7 +234,8 @@
+ depends on ARM && ARCH_PXA && PCMCIA
+ depends on (ARCH_LUBBOCK || MACH_MAINSTONE || PXA_SHARPSL \
+ || MACH_ARMCORE || ARCH_PXA_PALM || TRIZEPS_PCMCIA \
+- || ARCOM_PCMCIA || ARCH_PXA_ESERIES || MACH_STARGATE2)
++ || ARCOM_PCMCIA || ARCH_PXA_ESERIES || MACH_STARGATE2 \
++ || MACH_BALLOON3)
+ select PCMCIA_SOC_COMMON
+ help
+ Say Y here to include support for the PXA2xx PCMCIA controller
+Index: linux-2.6.34/arch/arm/mach-pxa/mfp-pxa2xx.c
+===================================================================
+--- linux-2.6.34.orig/arch/arm/mach-pxa/mfp-pxa2xx.c 2010-06-07 07:20:05.000000000 +0100
++++ linux-2.6.34/arch/arm/mach-pxa/mfp-pxa2xx.c 2010-06-07 07:21:43.000000000 +0100
+@@ -145,6 +145,7 @@
+ local_irq_restore(flags);
+ }
+ }
++EXPORT_SYMBOL_GPL(pxa2xx_mfp_config);
+
+ void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
+ {
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-powerfail.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-powerfail.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-powerfail.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,322 @@
+Index: linux-2.6.29.1/drivers/char/Kconfig
+===================================================================
+--- linux-2.6.29.1.orig/drivers/char/Kconfig 2009-09-21 01:17:07.000000000 +0100
++++ linux-2.6.29.1/drivers/char/Kconfig 2009-09-21 01:17:07.000000000 +0100
+@@ -680,6 +680,13 @@
+ help
+ TSL2560 light sensor driven down Samosa bus (for Balloonboard).
+
++config BALLOON3_POWERFAIL
++ tristate "Balloon 3 powerfail"
++ depends on MACH_BALLOON3
++ default m
++ help
++ Balloon 3 power failure detection device.
++
+ config HVCS
+ tristate "IBM Hypervisor Virtual Console Server support"
+ depends on PPC_PSERIES
+Index: linux-2.6.29.1/drivers/char/Makefile
+===================================================================
+--- linux-2.6.29.1.orig/drivers/char/Makefile 2009-09-21 01:17:07.000000000 +0100
++++ linux-2.6.29.1/drivers/char/Makefile 2009-09-21 01:17:07.000000000 +0100
+@@ -114,6 +114,7 @@
+ obj-$(CONFIG_SAMOSA) += samosa.o
+ obj-$(CONFIG_LMR5428) += lmr5428.o
+ obj-$(CONFIG_TSL2560) += tsl2560.o
++obj-$(CONFIG_BALLOON3_POWERFAIL) += balloon3-powerfail.o
+
+ # Files generated that shall be removed upon make clean
+ clean-files := consolemap_deftbl.c defkeymap.c
+Index: linux-2.6.29.1/drivers/char/balloon3-powerfail.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.29.1/drivers/char/balloon3-powerfail.c 2009-09-21 01:22:45.000000000 +0100
+@@ -0,0 +1,287 @@
++/*
++ * linux/drivers/char/balloon3-powerfail.c
++ *
++ * file interface balloon 3 power failure
++ * Copyright (c) Chris Jones, Martin-Jones Technology Ltd 2009
++ *
++*/
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/fs.h>
++#include <linux/uaccess.h>
++
++#include <mach/balloon3.h>
++#include <asm/cacheflush.h>
++
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/proc_fs.h>
++#include <linux/vmalloc.h>
++#include <linux/platform_device.h>
++#include <linux/spinlock.h>
++#include <linux/cdev.h>
++#include <linux/interrupt.h>
++
++#include <mach/pxa-regs.h>
++#include <mach/pxa2xx-regs.h>
++
++#define PMCR_INTRS (1<<5)
++#define PMCR_IAS (1<<4)
++#define PMCR_VIDAS (1<<3)
++#define PMCR_VIDAE (1<<2)
++#define PMCR_BIDAS (1<<1)
++#define PMCR_BIDAE (1<<0)
++
++/* character device start number */
++static dev_t dev;
++
++static int powerstate;
++
++static spinlock_t powerfail_lock;
++
++#define POWERSTATE_OK 0
++#define POWERSTATE_BATT_FAULT (1<<0)
++#define POWERSTATE_VDD_FAULT (1<<1)
++
++/* per device data */
++static struct powerfail_dev {
++ struct cdev cdev;
++} powerfail;
++
++static irqreturn_t powerfail_interrupt(int irq, struct irq_desc *desc);
++
++irqreturn_t powerfail_interrupt(int irq, struct irq_desc *desc) {
++ pr_info("%s\n",__func__);
++
++ /* look at PXA registers to see what's happened */
++ if(!(PMCR&PMCR_INTRS)) {
++ /* INTRS wasn't set, so this wasn't ours */
++ return IRQ_NONE;
++ }
++ PMCR|=PMCR_INTRS;
++
++ if(PMCR&PMCR_VIDAS) {
++ pr_info("VDD fault\n");
++ powerstate|=POWERSTATE_VDD_FAULT;
++ PMCR|=PMCR_VIDAS;
++ } else {
++ powerstate&=~POWERSTATE_VDD_FAULT;
++ }
++
++ if(PMCR&PMCR_BIDAS) {
++ pr_info("Batt fault\n");
++ powerstate|=POWERSTATE_BATT_FAULT;
++ PMCR|=PMCR_BIDAS;
++ } else {
++ powerstate&=~POWERSTATE_BATT_FAULT;
++ }
++
++ return IRQ_HANDLED;
++}
++
++static ssize_t powerfail_read(struct file *, char *, size_t, loff_t *);
++static ssize_t powerfail_write(struct file *, const char *, size_t, loff_t *);
++static int powerfail_open(struct inode *, struct file *);
++static int powerfail_release(struct inode *, struct file *);
++static int powerfail_ioctl(struct inode *, struct file *, unsigned int, unsigned long);
++static int powerfail_mmap(struct file *, struct vm_area_struct *vm);
++
++static struct file_operations powerfail_fops = {
++ read: powerfail_read,
++ write: powerfail_write,
++ open: powerfail_open,
++ release: powerfail_release,
++ ioctl: powerfail_ioctl,
++ mmap: powerfail_mmap,
++};
++
++/* proc interface */
++static ssize_t proc_read_powerfail(struct file *file, char *buf,
++ size_t nbytes, loff_t *ppos);
++static ssize_t proc_write_powerfail(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos);
++
++static struct file_operations proc_powerfail_operations = {
++ read: proc_read_powerfail,
++ write: proc_write_powerfail
++};
++static struct proc_dir_entry *proc_powerfail;
++#define PROC_POWERFAIL "powerfail"
++
++static int powerfail_open(struct inode *inode, struct file *filp)
++{
++ struct powerfail_dev *powerfail_devp;
++
++ powerfail_devp = container_of(inode->i_cdev, struct powerfail_dev, cdev);
++ filp->private_data = powerfail_devp;
++
++ return 0;
++}
++
++static int powerfail_release(struct inode *inode, struct file *filp)
++{
++ return 0;
++}
++
++static ssize_t powerfail_read(struct file *filp, char *buf,
++ size_t size, loff_t *offp)
++{
++ char outputbuf[80];
++ int count = 0;
++
++ /* all done in a single read */
++ if (*offp > 0)
++ return 0;
++
++ /* quick and dirty, this: just read the value of PMCR and munge it a bit */
++ if(PMCR&PMCR_VIDAS) powerstate |= POWERSTATE_VDD_FAULT;
++ if(PMCR&PMCR_BIDAS) powerstate |= POWERSTATE_BATT_FAULT;
++
++ count += sprintf(&outputbuf[count], "0x%02x\n", powerstate);
++
++ if (count > size) /* Assume output can be read at one time */
++ return -EINVAL;
++ if (copy_to_user(buf, outputbuf, count))
++ return -EFAULT;
++ *offp += count;
++ return count;
++}
++
++static ssize_t powerfail_write(struct file *filp, const char *buf,
++ size_t size, loff_t *offp)
++{
++ /* we don't support writing at the moment */
++ return -EINVAL;
++}
++
++/* maybe this will be handy in due course */
++static int powerfail_ioctl(struct inode *inode, struct file *flip,
++ unsigned int command, unsigned long arg)
++{
++ int err;
++ err = -EINVAL;
++ return err;
++}
++
++static int powerfail_mmap(struct file *filp, struct vm_area_struct *vma)
++{
++ /*struct powerfail_dev *mp = (struct powerfail_dev *)filp->private_data;*/
++
++ return -EINVAL;
++}
++
++
++static int proc_read_powerfail(struct file *filp, char *buf,
++ size_t nbytes, loff_t *ppos)
++{
++ char outputbuf[512];
++ int count = 0;
++
++ /* all done in a single read */
++ if (*ppos > 0)
++ return 0;
++
++ count += sprintf(&outputbuf[count], "powerfail: major dev = %d\n", MAJOR(dev));
++
++ if (count > nbytes) /* Assume output can be read at one time */
++ return -EINVAL;
++ if (copy_to_user(buf, outputbuf, count))
++ return -EFAULT;
++ *ppos += count;
++ return count;
++}
++
++static ssize_t proc_write_powerfail(struct file *filp, const char *buffer,
++ size_t count, loff_t *ppos)
++{
++ /* struct powerfail_dev *mp= (struct powerfail_dev *)filp->private_data;
++ * if (strncmp(buff,"reset:",6)==0)
++ * newRegValue = simple_strtoul(buffer,&endp,0);
++ * a bold but simple claim is to have read it all
++ */
++ return count;
++}
++
++/* class object */
++static struct class *powerfail_class;
++
++static int __init powerfail_init(void)
++{
++ int ret;
++
++ /* general initialisation */
++ spin_lock_init(&powerfail_lock);
++
++ /* register a range of device nodes */
++ ret = alloc_chrdev_region(&dev, 0, 1, "powerfail");
++ if (ret)
++ goto error;
++
++ /* create the powerfail character devices */
++ /* initialise character device */
++ cdev_init(&powerfail.cdev, &powerfail_fops);
++ /* claim ownership */
++ powerfail.cdev.owner = THIS_MODULE;
++ /* add character device */
++ ret = cdev_add(&powerfail.cdev, dev, 1);
++ if (ret) {
++ goto error_region;
++ }
++
++ /* create the class and devices */
++ powerfail_class = class_create(THIS_MODULE, "powerfail");
++
++ if (!device_create(powerfail_class, NULL, (dev), NULL, "powerfail"))
++ goto error_class_device;
++
++ /* create proc access */
++ proc_powerfail = create_proc_entry(PROC_POWERFAIL, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_powerfail)
++ proc_powerfail->proc_fops = &proc_powerfail_operations;
++
++ /* set up interrupt handler */
++ /* no, actually, don't: it's too hard */
++
++ powerstate =0;
++
++ /* clear any pending interrupts and put the power manager in the right state */
++ PMCR=PMCR_INTRS+PMCR_IAS+PMCR_VIDAS+PMCR_VIDAE+PMCR_BIDAS+PMCR_BIDAE;
++
++ return 0;
++
++error_class_device:
++ device_destroy(powerfail_class, dev);
++error_region:
++ unregister_chrdev_region(dev, 1);
++error:
++ return ret;
++}
++
++static void __exit powerfail_exit(void)
++{
++ /* remove interrupt handler */
++ /* we never registered it */
++
++ /* remove proc entry */
++ remove_proc_entry(PROC_POWERFAIL, NULL);
++
++ /* remove class device */
++ device_destroy(powerfail_class, (dev));
++
++ /* remove character device */
++ cdev_del(&powerfail.cdev);
++
++ /* unregister region */
++ unregister_chrdev_region(dev, 1);
++
++ /* remove class */
++ class_destroy(powerfail_class);
++}
++
++module_init(powerfail_init);
++module_exit(powerfail_exit);
++
++MODULE_AUTHOR("Chris Jones <chris@martin-jones.com>");
++MODULE_DESCRIPTION("Balloon 3 power failure device");
++MODULE_LICENSE("GPL");
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-samosa-podpoint.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-samosa-podpoint.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-samosa-podpoint.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,357 @@
+Index: linux-2.6.31/drivers/char/samosa.c
+===================================================================
+--- linux-2.6.31.orig/drivers/char/samosa.c 2010-01-11 22:16:24.000000000 +0000
++++ linux-2.6.31/drivers/char/samosa.c 2010-01-11 22:20:01.000000000 +0000
+@@ -10,6 +10,9 @@
+ *
+ */
+
++/* JIM - back ported proc code from 2.6.29.1 */
++#define CONFIG_PROC_SAMOSA
++
+ #include <linux/samosa.h>
+ #include <linux/module.h>
+ #include <linux/init.h>
+@@ -689,16 +692,45 @@
+ EXPORT_SYMBOL_GPL(samosa_bus_type);
+
+ #ifdef CONFIG_PROC_SAMOSA
+-#define PROC_SAMOSA "samosa"
+-static ssize_t proc_read_samosa(struct file *file, char *buf,
++static ssize_t proc_read_samosa_default(struct file *file, char *buf,
+ size_t nbytes, loff_t *ppos) {
++ char outputbuf[512];
+ int count = 0;
++
++ /* all done in a single read */
++ if (*ppos > 0)
++ return 0;
++
++ count += sprintf(&outputbuf[count], "Hello - I'm a test message from Jim\n");
++
++ if (count > nbytes)
++ return -EINVAL;
++ if (copy_to_user(buf, outputbuf, count))
++ return -EFAULT;
++ *ppos += count;
+ return count;
+ }
+
+-static ssize_t proc_write_samosa(struct file *file, const char *buffer,
++static ssize_t proc_read_samosa(unsigned char reg, struct file *file, char *buf,
++ size_t nbytes, loff_t *ppos) {
++ char val;
++ char outputbuf[10];
++
++ /* all done in a single read */
++ if (*ppos > 0)
++ return 0;
++
++ val = samosa_read8(reg);
++ sprintf(outputbuf,"%02x",val);
++
++ if (copy_to_user(buf, outputbuf, 2))
++ return -EFAULT;
++ *ppos += 2;
++ return 2;
++}
++
++static ssize_t proc_write_samosa(unsigned char reg, struct file *file, const char *buffer,
+ size_t count, loff_t *ppos) {
+- unsigned long samosa_addr;
+ unsigned long samosa_data;
+ char buf[40];
+ char *p = buf;
+@@ -713,28 +745,202 @@
+ buf[count] = 0;
+ while (isspace(*p))
+ p++;
+- samosa_addr = simple_strtoul(p,&pp,0);
+- if (pp && (pp > p)) {
+- p = pp;
+- while (isspace(*p))
+- p++;
+- samosa_data = simple_strtoul(p,&pp,0);
+- if (pp && (pp > p))
+- samosa_write8(samosa_addr, samosa_data);
+- else
+- pr_info("cannot parse data from <%s> address = 0x%lx\n",p,samosa_addr);
+- }
++
++ samosa_data = simple_strtoul(p,&pp,0);
++ if (pp && (pp > p))
++ samosa_write8(reg, samosa_data);
+ else
+- pr_info("cannot parse address from start of <%s>\n",buf);
++ pr_info("cannot parse data from <%s> reg 0x%02x\n",p,reg);
+ return count;
+ }
+
+-static struct file_operations proc_samosa_operations = {
+- read: proc_read_samosa,
+- write: proc_write_samosa
++/* All very quick hack and very dirty - DON'T write to/read from more than one proc dir at a time */
++
++/* write */
++static ssize_t proc_write_samosa_backlight(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_write_samosa(0x02, file, buffer, count, ppos);
++}
++
++static ssize_t proc_write_samosa_brightness(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_write_samosa(0x03, file, buffer, count, ppos);
++}
++
++static ssize_t proc_write_samosa_leds_clear(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_write_samosa(0x84, file, buffer, count, ppos);
++}
++
++static ssize_t proc_write_samosa_leds_set(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_write_samosa(0x04, file, buffer, count, ppos);
++}
++
++static ssize_t proc_write_samosa_doors_clear(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_write_samosa(0x85, file, buffer, count, ppos);
++}
++
++static ssize_t proc_write_samosa_doors_set(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_write_samosa(0x05, file, buffer, count, ppos);
++}
++
++static ssize_t proc_write_samosa_assorted_clear(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_write_samosa(0x86, file, buffer, count, ppos);
++}
++
++static ssize_t proc_write_samosa_assorted_set(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_write_samosa(0x06, file, buffer, count, ppos);
++}
++
++static ssize_t proc_write_samosa_lcd_data(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_write_samosa(0x00, file, buffer, count, ppos);
++}
++
++static ssize_t proc_write_samosa_lcd_cntrl(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_write_samosa(0x01, file, buffer, count, ppos);
++}
++
++static ssize_t proc_write_samosa_interrupt_enable_set(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_write_samosa(0x0e, file, buffer, count, ppos);
++}
++
++static ssize_t proc_write_samosa_interrupt_enable_clear(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_write_samosa(0x0e, file, buffer, count, ppos);
++}
++
++static ssize_t proc_write_samosa_interrupt_status(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_write_samosa(0x0f, file, buffer, count, ppos);
++}
++
++/* read */
++static ssize_t proc_read_samosa_doors_clear(struct file *file, char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_read_samosa(0x85, file, buffer, count, ppos);
++}
++
++static ssize_t proc_read_samosa_doors_set(struct file *file, char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_read_samosa(0x05, file, buffer, count, ppos);
++}
++
++static ssize_t proc_read_samosa_assorted_clear(struct file *file, char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_read_samosa(0x86, file, buffer, count, ppos);
++}
++
++static ssize_t proc_read_samosa_assorted_set(struct file *file, char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_read_samosa(0x06, file, buffer, count, ppos);
++}
++
++static ssize_t proc_read_samosa_lcd_data(struct file *file, char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_read_samosa(0x00, file, buffer, count, ppos);
++}
++
++static ssize_t proc_read_samosa_lcd_cntrl(struct file *file, char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_read_samosa(0x01, file, buffer, count, ppos);
++}
++
++static ssize_t proc_read_samosa_interrupt_status(struct file *file, char *buffer,
++ size_t count, loff_t *ppos) {
++ return proc_read_samosa(0x0f, file, buffer, count, ppos);
++}
++
++/* operations */
++static struct file_operations proc_samosa_ops_backlight = {
++ read: proc_read_samosa_default,
++ write:proc_write_samosa_backlight
+ };
+
+-static struct proc_dir_entry *proc_samosa;
++static struct file_operations proc_samosa_ops_brightness = {
++ read: proc_read_samosa_default,
++ write:proc_write_samosa_brightness
++};
++
++static struct file_operations proc_samosa_ops_leds_clear = {
++ read: proc_read_samosa_default,
++ write:proc_write_samosa_leds_clear
++};
++
++static struct file_operations proc_samosa_ops_leds_set = {
++ read: proc_read_samosa_default,
++ write:proc_write_samosa_leds_set
++};
++
++static struct file_operations proc_samosa_ops_doors_clear = {
++ read: proc_read_samosa_doors_clear,
++ write:proc_write_samosa_doors_clear
++};
++
++static struct file_operations proc_samosa_ops_doors_set = {
++ read: proc_read_samosa_doors_set,
++ write:proc_write_samosa_doors_set
++};
++
++static struct file_operations proc_samosa_ops_assorted_clear = {
++ read: proc_read_samosa_assorted_clear,
++ write:proc_write_samosa_assorted_clear
++};
++
++static struct file_operations proc_samosa_ops_assorted_set = {
++ read: proc_read_samosa_assorted_set,
++ write:proc_write_samosa_assorted_set
++};
++
++static struct file_operations proc_samosa_ops_lcd_data = {
++ read: proc_read_samosa_lcd_data,
++ write:proc_write_samosa_lcd_data
++};
++
++static struct file_operations proc_samosa_ops_lcd_cntrl = {
++ read: proc_read_samosa_lcd_cntrl,
++ write:proc_write_samosa_lcd_cntrl
++};
++
++static struct file_operations proc_samosa_ops_interrupt_enable_set = {
++ read: proc_read_samosa_default,
++ write:proc_write_samosa_interrupt_enable_set
++};
++
++static struct file_operations proc_samosa_ops_interrupt_enable_clear = {
++ read: proc_read_samosa_default,
++ write:proc_write_samosa_interrupt_enable_clear
++};
++
++static struct file_operations proc_samosa_ops_interrupt_status = {
++ read: proc_read_samosa_interrupt_status,
++ write:proc_write_samosa_interrupt_status
++};
++
++static struct proc_dir_entry *proc_samosa_pod[13];
++
++#define PROC_SAMOSA_BACKLIGHT "pod_backlight" /* 02 w */
++#define PROC_SAMOSA_BRIGHTNESS "pod_brightness" /* 03 w */
++#define PROC_SAMOSA_LEDS_CLEAR "pod_leds_clear" /* 04 w */
++#define PROC_SAMOSA_LEDS_SET "pod_leds_set" /* 84 w */
++#define PROC_SAMOSA_DOORS_CLEAR "pod_doors_clear" /* 05 rw */
++#define PROC_SAMOSA_DOORS_SET "pod_doors_set" /* 85 rw */
++#define PROC_SAMOSA_ASSORTED_CLEAR "pod_assorted_clear" /* 06 rw */
++#define PROC_SAMOSA_ASSORTED_SET "pod_assorted_set" /* 86 rw */
++
++#define PROC_SAMOSA_LCD_DATA "pod_lcd_data" /* 00 rw */
++#define PROC_SAMOSA_LCD_CNTRL "pod_lcd_cntrl" /* 01 rw */
++#define PROC_SAMOSA_INTERRUPT_ENABLE_SET "pod_interrupt_enable_set" /* 0e w */
++#define PROC_SAMOSA_INTERRUPT_ENABLE_CLEAR "pod_interrupt_enable_clear" /* 1e w */
++#define PROC_SAMOSA_INTERRUPT_STATUS "pod_interrupt_status" /* 0f rw */
++
+ #endif
+
+ static int __init samosa_bus_init(void)
+@@ -755,10 +961,48 @@
+ pr_info("Samosa services initialised.\n");
+ ver = BALLOON3_VERSION_REG;
+ pr_info("VHDL logic version (memread):%08X\n", ver);
++ pr_info("Jim hacked podpoint version v0.02 (write/read various /proc/pod_* entries)\n");
+ #ifdef CONFIG_PROC_SAMOSA
+- proc_samosa = create_proc_entry(PROC_SAMOSA, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
+- if (proc_samosa)
+- proc_samosa->proc_fops = &proc_samosa_operations;
++ proc_samosa_pod[0] = create_proc_entry(PROC_SAMOSA_BACKLIGHT, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_samosa_pod[0])
++ proc_samosa_pod[0]->proc_fops = &proc_samosa_ops_backlight;
++ proc_samosa_pod[1] = create_proc_entry(PROC_SAMOSA_BRIGHTNESS, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_samosa_pod[1])
++ proc_samosa_pod[1]->proc_fops = &proc_samosa_ops_brightness;
++ proc_samosa_pod[2] = create_proc_entry(PROC_SAMOSA_LEDS_CLEAR, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_samosa_pod[2])
++ proc_samosa_pod[2]->proc_fops = &proc_samosa_ops_leds_clear;
++ proc_samosa_pod[3] = create_proc_entry(PROC_SAMOSA_LEDS_SET, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_samosa_pod[3])
++ proc_samosa_pod[3]->proc_fops = &proc_samosa_ops_leds_set;
++ proc_samosa_pod[4] = create_proc_entry(PROC_SAMOSA_DOORS_CLEAR, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_samosa_pod[4])
++ proc_samosa_pod[4]->proc_fops = &proc_samosa_ops_doors_clear;
++ proc_samosa_pod[5] = create_proc_entry(PROC_SAMOSA_DOORS_SET, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_samosa_pod[5])
++ proc_samosa_pod[5]->proc_fops = &proc_samosa_ops_doors_set;
++ proc_samosa_pod[6] = create_proc_entry(PROC_SAMOSA_ASSORTED_CLEAR, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_samosa_pod[6])
++ proc_samosa_pod[6]->proc_fops = &proc_samosa_ops_assorted_clear;
++ proc_samosa_pod[7] = create_proc_entry(PROC_SAMOSA_ASSORTED_SET, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_samosa_pod[7])
++ proc_samosa_pod[7]->proc_fops = &proc_samosa_ops_assorted_set;
++
++ proc_samosa_pod[8] = create_proc_entry(PROC_SAMOSA_LCD_DATA, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_samosa_pod[8])
++ proc_samosa_pod[8]->proc_fops = &proc_samosa_ops_lcd_data;
++ proc_samosa_pod[9] = create_proc_entry(PROC_SAMOSA_LCD_CNTRL, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_samosa_pod[9])
++ proc_samosa_pod[9]->proc_fops = &proc_samosa_ops_lcd_cntrl;
++ proc_samosa_pod[10] = create_proc_entry(PROC_SAMOSA_INTERRUPT_ENABLE_SET, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_samosa_pod[10])
++ proc_samosa_pod[10]->proc_fops = &proc_samosa_ops_interrupt_enable_set;
++ proc_samosa_pod[11] = create_proc_entry(PROC_SAMOSA_INTERRUPT_ENABLE_CLEAR, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_samosa_pod[11])
++ proc_samosa_pod[11]->proc_fops = &proc_samosa_ops_interrupt_enable_clear;
++ proc_samosa_pod[12] = create_proc_entry(PROC_SAMOSA_INTERRUPT_STATUS, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_samosa_pod[12])
++ proc_samosa_pod[12]->proc_fops = &proc_samosa_ops_interrupt_status;
+ #endif
+ }
+ else
+@@ -769,7 +1013,20 @@
+ static void __exit samosa_bus_remove(void)
+ {
+ #ifdef CONFIG_PROC_SAMOSA
+- remove_proc_entry(PROC_SAMOSA, NULL);
++ remove_proc_entry(PROC_SAMOSA_BACKLIGHT, NULL);
++ remove_proc_entry(PROC_SAMOSA_BRIGHTNESS, NULL);
++ remove_proc_entry(PROC_SAMOSA_LEDS_CLEAR, NULL);
++ remove_proc_entry(PROC_SAMOSA_LEDS_SET, NULL);
++ remove_proc_entry(PROC_SAMOSA_DOORS_CLEAR, NULL);
++ remove_proc_entry(PROC_SAMOSA_DOORS_SET, NULL);
++ remove_proc_entry(PROC_SAMOSA_ASSORTED_CLEAR, NULL);
++ remove_proc_entry(PROC_SAMOSA_ASSORTED_SET, NULL);
++
++ remove_proc_entry(PROC_SAMOSA_LCD_DATA, NULL);
++ remove_proc_entry(PROC_SAMOSA_LCD_CNTRL, NULL);
++ remove_proc_entry(PROC_SAMOSA_INTERRUPT_ENABLE_SET, NULL);
++ remove_proc_entry(PROC_SAMOSA_INTERRUPT_ENABLE_CLEAR, NULL);
++ remove_proc_entry(PROC_SAMOSA_INTERRUPT_STATUS, NULL);
+ #endif
+
+ bus_unregister(&samosa_bus_type);
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-samosa-uart.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-samosa-uart.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-samosa-uart.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,193 @@
+Index: linux-2.6.31/include/linux/serial_core.h
+===================================================================
+--- linux-2.6.31.orig/include/linux/serial_core.h 2009-09-09 23:13:59.000000000 +0100
++++ linux-2.6.31/include/linux/serial_core.h 2010-01-12 04:09:34.000000000 +0000
+@@ -280,6 +280,7 @@
+ #define UPIO_TSI (5) /* Tsi108/109 type IO */
+ #define UPIO_DWAPB (6) /* DesignWare APB UART */
+ #define UPIO_RM9000 (7) /* RM9000 type IO */
++#define UPIO_SAMOSA (8) /* SAMOSA IO */
+
+ unsigned int read_status_mask; /* driver specific */
+ unsigned int ignore_status_mask; /* driver specific */
+Index: linux-2.6.31/drivers/serial/8250.c
+===================================================================
+--- linux-2.6.31.orig/drivers/serial/8250.c 2009-09-09 23:13:59.000000000 +0100
++++ linux-2.6.31/drivers/serial/8250.c 2010-01-12 04:09:34.000000000 +0000
+@@ -39,6 +39,8 @@
+ #include <linux/nmi.h>
+ #include <linux/mutex.h>
+
++#include <linux/samosa.h>
++
+ #include <asm/io.h>
+ #include <asm/irq.h>
+
+@@ -477,6 +479,18 @@
+ outb(value, p->iobase + offset);
+ }
+
++static unsigned int samosa_serial_in(struct uart_port *p, int offset)
++{
++ offset = map_8250_in_reg(p, offset) << p->regshift;
++ return samosa_read8((unsigned char)(p->iobase + offset));
++}
++
++static void samosa_serial_out(struct uart_port *p, int offset, int value)
++{
++ offset = map_8250_out_reg(p, offset) << p->regshift;
++ samosa_write8((unsigned char)(p->iobase + offset), value);
++}
++
+ static void set_io_from_upio(struct uart_port *p)
+ {
+ struct uart_8250_port *up = (struct uart_8250_port *)p;
+@@ -513,6 +527,11 @@
+ p->serial_out = dwapb_serial_out;
+ break;
+
++ case UPIO_SAMOSA:
++ p->serial_in = samosa_serial_in;
++ p->serial_out = samosa_serial_out;
++ break;
++
+ default:
+ p->serial_in = io_serial_in;
+ p->serial_out = io_serial_out;
+@@ -2418,8 +2437,9 @@
+
+ serial8250_set_sleep(p, state != 0);
+
+- if (p->pm)
++ if (p->pm) {
+ p->pm(port, state, oldstate);
++ }
+ }
+
+ static unsigned int serial8250_port_size(struct uart_8250_port *pt)
+@@ -2845,9 +2865,9 @@
+ static struct uart_driver serial8250_reg = {
+ .owner = THIS_MODULE,
+ .driver_name = "serial",
+- .dev_name = "ttyS",
++ .dev_name = "ttySM",
+ .major = TTY_MAJOR,
+- .minor = 64,
++ .minor = 70,
+ .cons = SERIAL8250_CONSOLE,
+ };
+
+Index: linux-2.6.31/include/linux/serial_8250.h
+===================================================================
+--- linux-2.6.31.orig/include/linux/serial_8250.h 2009-09-09 23:13:59.000000000 +0100
++++ linux-2.6.31/include/linux/serial_8250.h 2010-01-12 04:09:34.000000000 +0000
+@@ -50,6 +50,7 @@
+ PLAT8250_DEV_MCA,
+ PLAT8250_DEV_AU1X00,
+ PLAT8250_DEV_SM501,
++ PLAT8250_DEV_SAMOSA_PODPOINT
+ };
+
+ /*
+Index: linux-2.6.31/drivers/serial/Kconfig
+===================================================================
+--- linux-2.6.31.orig/drivers/serial/Kconfig 2009-09-09 23:13:59.000000000 +0100
++++ linux-2.6.31/drivers/serial/Kconfig 2010-01-12 04:09:34.000000000 +0000
+@@ -167,6 +167,16 @@
+ # Multi-port serial cards
+ #
+
++config SERIAL_8250_SAMOSA_PODPOINT
++ tristate "Support Samosa UART on PodPoint"
++ depends on SERIAL_8250 != n && SAMOSA && SERIAL_8250_MANY_PORTS
++ default m
++ help
++ Say Y here if you have a PodPoint on your Samosa bus.
++
++ To compile this driver as a module, choose M here: the module
++ will be called 8250_samosa_podpoint.
++
+ config SERIAL_8250_FOURPORT
+ tristate "Support Fourport cards"
+ depends on SERIAL_8250 != n && ISA && SERIAL_8250_MANY_PORTS
+Index: linux-2.6.31/drivers/serial/Makefile
+===================================================================
+--- linux-2.6.31.orig/drivers/serial/Makefile 2009-09-09 23:13:59.000000000 +0100
++++ linux-2.6.31/drivers/serial/Makefile 2010-01-12 04:10:59.000000000 +0000
+@@ -79,3 +79,4 @@
+ obj-$(CONFIG_KGDB_SERIAL_CONSOLE) += kgdboc.o
+ obj-$(CONFIG_SERIAL_QE) += ucc_uart.o
+ obj-$(CONFIG_SERIAL_TIMBERDALE) += timbuart.o
++obj-$(CONFIG_SERIAL_8250_SAMOSA_PODPOINT) += 8250_samosa_podpoint.o
+Index: linux-2.6.31/drivers/serial/serial_core.c
+===================================================================
+--- linux-2.6.31.orig/drivers/serial/serial_core.c 2009-09-09 23:13:59.000000000 +0100
++++ linux-2.6.31/drivers/serial/serial_core.c 2010-01-12 04:09:34.000000000 +0000
+@@ -2146,6 +2146,10 @@
+ snprintf(address, sizeof(address),
+ "MMIO 0x%llx", (unsigned long long)port->mapbase);
+ break;
++ case UPIO_SAMOSA:
++ snprintf(address, sizeof(address),
++ "Samosa 0x%02x", port->iobase);
++ break;
+ default:
+ strlcpy(address, "*unknown*", sizeof(address));
+ break;
+Index: linux-2.6.31/drivers/serial/8250_samosa_podpoint.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.31/drivers/serial/8250_samosa_podpoint.c 2010-01-12 04:09:34.000000000 +0000
+@@ -0,0 +1,52 @@
++/*
++ * linux/drivers/serial/8250_samosa_podpoint.c
++ *
++ * Copyright (C) 2005 Russell King.
++ * Data taken from include/asm-i386/serial.h
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/serial_8250.h>
++#include <mach/irqs.h>
++
++#define PORT(_base,_irq) \
++ { \
++ .iobase = _base, \
++ .irq = _irq, \
++ .uartclk = 7372800, \
++ .iotype = UPIO_SAMOSA, \
++ .flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ \
++ }
++
++static struct plat_serial8250_port samosa_podpoint_data[] = {
++ PORT(0x10, BALLOON3_SAMOSA_IRQ),
++ PORT(0x18, BALLOON3_SAMOSA_IRQ),
++ PORT(0x20, BALLOON3_SAMOSA_IRQ),
++ PORT(0x28, BALLOON3_SAMOSA_IRQ),
++ { },
++};
++
++static struct platform_device samosa_podpoint_device = {
++ .name = "serial8250",
++ .id = PLAT8250_DEV_SAMOSA_PODPOINT,
++ .dev = {
++ .platform_data = samosa_podpoint_data,
++ },
++};
++
++static int __init samosa_podpoint_init(void)
++{
++ pr_info("%s\n",__func__);
++
++ return platform_device_register(&samosa_podpoint_device);
++}
++
++module_init(samosa_podpoint_init);
++
++MODULE_AUTHOR("Martin-Jones Technology Ltd");
++MODULE_DESCRIPTION("8250 serial probe module for Balloon 3 Samosa bus on PodPoint");
++MODULE_LICENSE("GPL");
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-samosa.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-samosa.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-samosa.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,901 @@
+Balloon3 Samosa bus support
+
+Samosa is a simple 16-bit bus implemented in the FPGA or CPLD on
+balloon3. Balloon2 also supports the bus.
+
+from: Nick Bane <nick@cecomputing.co.uk>
+
+Signed-off-by: Wookey <wookey@wookware.org>
+
+Index: linux-2.6.34/drivers/char/Makefile
+===================================================================
+--- linux-2.6.34.orig/drivers/char/Makefile 2010-05-23 11:04:57.000000000 +0100
++++ linux-2.6.34/drivers/char/Makefile 2010-05-23 11:17:56.000000000 +0100
+@@ -111,6 +111,8 @@
+ obj-$(CONFIG_JS_RTC) += js-rtc.o
+ js-rtc-y = rtc.o
+
++obj-$(CONFIG_SAMOSA) += samosa.o
++
+ # Files generated that shall be removed upon make clean
+ clean-files := consolemap_deftbl.c defkeymap.c
+
+Index: linux-2.6.34/drivers/char/Kconfig
+===================================================================
+--- linux-2.6.34.orig/drivers/char/Kconfig 2010-05-23 11:04:57.000000000 +0100
++++ linux-2.6.34/drivers/char/Kconfig 2010-05-23 11:17:56.000000000 +0100
+@@ -1113,5 +1113,22 @@
+
+ source "drivers/s390/char/Kconfig"
+
++config SAMOSA
++ tristate "Balloon samosa bus"
++ depends on MACH_BALLOON3 || MACH_BALLOON2
++ default y
++ help
++ Simple IO bus (via FPGA/CPLD) on Balloonboard. 8 bit on
++ Balloon2, 8 or 16 bit on Balloon3. You normally want this
++ unless you are using the bus lines for something else.
++
++config PROC_SAMOSA
++ bool "Balloon samosa bus proc interface"
++ depends on SAMOSA
++ default n
++ help
++ Enable procfs access to samosa bus as /proc/samosa
++ writes are formatted as samosa_address data_byte
++
+ endmenu
+
+Index: linux-2.6.34/drivers/char/samosa.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.34/drivers/char/samosa.c 2010-05-23 11:19:48.000000000 +0100
+@@ -0,0 +1,784 @@
++/*
++ * drivers/char/samosa.c
++ * Author: Nick Bane
++ * Created: May 2005
++ * Copyright: Toby Churchill Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ */
++
++#include <linux/samosa.h>
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/err.h>
++#include <linux/slab.h>
++#include <linux/io.h>
++#include <linux/interrupt.h>
++#include <linux/irq.h>
++#ifdef CONFIG_PROC_SAMOSA
++#include <linux/proc_fs.h>
++#include <linux/ctype.h>
++#include <linux/uaccess.h>
++#endif
++
++#include <linux/kernel.h>
++
++#include <mach/hardware.h>
++#include <asm/mach-types.h>
++#include <asm/setup.h>
++
++#include <asm/mach/arch.h>
++
++#include <mach/pxa27x.h>
++#include <mach/balloon3.h>
++
++#include <linux/spinlock.h>
++
++static DEFINE_SPINLOCK(samosa_lock);
++
++#ifdef CONFIG_MACH_BALLOON3
++/* balloon3 version */
++
++/* Samosa bus on Balloon3 is dead simple. Address latching and
++ * read/write enable are taken care of automaticaly by FPGA/CPLD logic.
++ * So just write address to address register
++ * then read or write data from/to data register
++ */
++
++int samosa_read8(unsigned char reg)
++{
++ int ret;
++ unsigned long flags;
++ pr_debug("Samosa byte read:reg %x, ", reg);
++ spin_lock_irqsave(&samosa_lock, flags);
++ __raw_writel(reg, BALLOON3_SAMOSA_ADDR_REG);
++ ret = __raw_readl(BALLOON3_SAMOSA_DATA_REG);
++ spin_unlock_irqrestore(&samosa_lock, flags);
++ pr_debug("returned:%x\n", ret);
++ return ret;
++}
++EXPORT_SYMBOL_GPL(samosa_read8);
++
++void samosa_write8(unsigned char reg, unsigned char value)
++{
++ unsigned long flags;
++ pr_debug("Samosa byte write:value:%x to reg %x\n", value, reg);
++ spin_lock_irqsave(&samosa_lock, flags);
++ __raw_writel(reg, BALLOON3_SAMOSA_ADDR_REG);
++ __raw_writel(value, BALLOON3_SAMOSA_DATA_REG);
++ spin_unlock_irqrestore(&samosa_lock, flags);
++}
++EXPORT_SYMBOL_GPL(samosa_write8);
++
++void samosa_write_block8(unsigned char reg, const unsigned char *value,
++ unsigned int count)
++{
++ unsigned long flags;
++ pr_debug("Samosa block byte write:count %d\n", count);
++ spin_lock_irqsave(&samosa_lock, flags);
++ __raw_writel(reg, BALLOON3_SAMOSA_ADDR_REG);
++ while (count--)
++ __raw_writel(*(value)++, BALLOON3_SAMOSA_DATA_REG);
++ spin_unlock_irqrestore(&samosa_lock, flags);
++}
++EXPORT_SYMBOL_GPL(samosa_write_block8);
++
++void samosa_write_repeat8(unsigned char reg, unsigned char value,
++ unsigned int count)
++{
++ unsigned long flags;
++ pr_debug("Samosa repeat byte write:value:%x, count %d\n", value, count);
++ spin_lock_irqsave(&samosa_lock, flags);
++ __raw_writel(reg, BALLOON3_SAMOSA_ADDR_REG);
++ while (count--)
++ __raw_writel(value, BALLOON3_SAMOSA_DATA_REG);
++ spin_unlock_irqrestore(&samosa_lock, flags);
++}
++EXPORT_SYMBOL_GPL(samosa_write_repeat8);
++
++/* fixme - this should probably do something...*/
++int samosa_sm_present(void)
++{
++ return 0;
++}
++EXPORT_SYMBOL_GPL(samosa_sm_present);
++
++#endif
++
++/* samosa bus support */
++
++#define to_samosa_driver(drv) (container_of((drv), struct samosa_driver, \
++ driver))
++
++//static void samosa_bus_release(struct device *dev) {
++//}
++
++struct device samosa_bus = {
++ .init_name = "samosa",
++#if 0
++ .bus_id = "samosa",
++#endif
++// .release = samosa_bus_release,
++};
++EXPORT_SYMBOL_GPL(samosa_bus);
++
++struct samosa_object {
++ struct samosa_device sdev;
++ char name[1];
++};
++
++void samosa_device_put(struct samosa_device *sdev)
++{
++ if (sdev)
++ put_device(&sdev->dev);
++}
++EXPORT_SYMBOL_GPL(samosa_device_put);
++
++static void samosa_device_release(struct device *dev)
++{
++ struct samosa_object *sa = container_of(dev, struct samosa_object,
++ sdev.dev);
++
++ kfree(sa->sdev.dev.platform_data);
++ kfree(sa);
++}
++
++struct samosa_device *samosa_device_alloc(const char *name, int id)
++{
++ struct samosa_object *sa;
++
++ sa = kzalloc(sizeof(struct samosa_object) + strlen(name), GFP_KERNEL);
++ if (sa) {
++ strcpy(sa->name, name);
++ sa->sdev.name = sa->name;
++ sa->sdev.id = id;
++ device_initialize(&sa->sdev.dev);
++ sa->sdev.dev.release = samosa_device_release;
++ }
++
++ return sa ? &sa->sdev : NULL;
++}
++EXPORT_SYMBOL_GPL(samosa_device_alloc);
++
++int samosa_device_add(struct samosa_device *sdev)
++{
++ int ret = 0;
++
++ if (!sdev)
++ return -EINVAL;
++
++ if (!sdev->dev.parent)
++ sdev->dev.parent = &samosa_bus;
++
++ sdev->dev.bus = &samosa_bus_type;
++
++ if (sdev->id != -1)
++ dev_set_name(&sdev->dev, "%s.%d", sdev->name, sdev->id);
++ else
++ dev_set_name(&sdev->dev, "%s", sdev->name);
++
++ pr_debug("Registering samosa device '%s'. Parent at %s\n",
++ dev_name(&sdev->dev), dev_name(sdev->dev.parent));
++
++ ret = device_add(&sdev->dev);
++
++ return ret;
++}
++EXPORT_SYMBOL_GPL(samosa_device_add);
++
++void samosa_device_del(struct samosa_device *sdev)
++{
++ if (sdev)
++ device_del(&sdev->dev);
++}
++EXPORT_SYMBOL_GPL(samosa_device_del);
++
++int samosa_device_register(struct samosa_device *sdev)
++{
++ device_initialize(&sdev->dev);
++ return samosa_device_add(sdev);
++}
++EXPORT_SYMBOL_GPL(samosa_device_register);
++
++void samosa_device_unregister(struct samosa_device *sdev)
++{
++ samosa_device_del(sdev);
++ samosa_device_put(sdev);
++}
++EXPORT_SYMBOL_GPL(samosa_device_unregister);
++
++struct samosa_device *samosa_device_register_simple(const char *name, int id)
++{
++ struct samosa_device *sdev;
++ int retval;
++
++ sdev = samosa_device_alloc(name, id);
++ if (!sdev) {
++ retval = -ENOMEM;
++ goto error;
++ }
++
++
++ retval = samosa_device_add(sdev);
++ if (retval)
++ goto error;
++
++ return sdev;
++
++error:
++ samosa_device_put(sdev);
++ return ERR_PTR(retval);
++}
++EXPORT_SYMBOL_GPL(samosa_device_register_simple);
++
++static int samosa_drv_probe(struct device *_dev)
++{
++ struct samosa_driver *drv = to_samosa_driver(_dev->driver);
++ struct samosa_device *dev = to_samosa_device(_dev);
++
++ return drv->probe(dev);
++}
++
++static int samosa_drv_probe_fail(struct device *_dev)
++{
++ return -ENXIO;
++}
++
++static int samosa_drv_remove(struct device *_dev)
++{
++ struct samosa_driver *drv = to_samosa_driver(_dev->driver);
++ struct samosa_device *dev = to_samosa_device(_dev);
++
++ return drv->remove(dev);
++}
++
++static void samosa_drv_shutdown(struct device *_dev)
++{
++ struct samosa_driver *drv = to_samosa_driver(_dev->driver);
++ struct samosa_device *dev = to_samosa_device(_dev);
++
++ drv->shutdown(dev);
++}
++
++static int samosa_drv_suspend(struct device *_dev, pm_message_t state)
++{
++ struct samosa_driver *drv = to_samosa_driver(_dev->driver);
++ struct samosa_device *dev = to_samosa_device(_dev);
++
++ return drv->suspend(dev, state);
++}
++
++static int samosa_drv_resume(struct device *_dev)
++{
++ struct samosa_driver *drv = to_samosa_driver(_dev->driver);
++ struct samosa_device *dev = to_samosa_device(_dev);
++
++ return drv->resume(dev);
++}
++
++int samosa_driver_register(struct samosa_driver *drv)
++{
++ drv->driver.bus = &samosa_bus_type;
++ if (drv->probe)
++ drv->driver.probe = samosa_drv_probe;
++ if (drv->remove)
++ drv->driver.remove = samosa_drv_remove;
++ if (drv->shutdown)
++ drv->driver.shutdown = samosa_drv_shutdown;
++ if (drv->suspend)
++ drv->driver.suspend = samosa_drv_suspend;
++ if (drv->resume)
++ drv->driver.resume = samosa_drv_resume;
++ return driver_register(&drv->driver);
++}
++EXPORT_SYMBOL_GPL(samosa_driver_register);
++
++void samosa_driver_unregister(struct samosa_driver *drv)
++{
++ driver_unregister(&drv->driver);
++}
++EXPORT_SYMBOL_GPL(samosa_driver_unregister);
++
++
++/* modalias support enables more hands-off userspace setup:
++ * (a) environment variable lets new-style hotplug events work once system is
++ * fully running: "modprobe $MODALIAS"
++ * (b) sysfs attribute lets new-style coldplug recover from hotplug events
++ * mishandled before system is fully running: "modprobe $(cat modalias)"
++ */
++static ssize_t modalias_show(struct device *dev, struct device_attribute *a,
++ char *buf)
++{
++ struct samosa_device *sdev = to_samosa_device(dev);
++ int len = snprintf(buf, PAGE_SIZE, "samosa:%s\n", sdev->name);
++
++ return (len >= PAGE_SIZE) ? (PAGE_SIZE - 1) : len;
++}
++
++static struct device_attribute samosa_dev_attrs[] = {
++ __ATTR_RO(modalias),
++ __ATTR_NULL,
++};
++
++static int samosa_uevent(struct device *dev, struct kobj_uevent_env *env)
++{
++ struct samosa_device *sdev = to_samosa_device(dev);
++
++ add_uevent_var(env, "MODALIAS=samosa:%s", sdev->name);
++ return 0;
++}
++
++static int samosa_match(struct device *dev, struct device_driver *drv)
++{
++ struct samosa_device *sdev = to_samosa_device(dev);
++// struct samosa_driver *sdrv = to_samosa_driver(drv);
++
++ /* do driver name match */
++ return (strcmp(sdev->name, drv->name) == 0);
++}
++
++
++#ifdef CONFIG_PM_SLEEP
++
++static int samosa_legacy_suspend(struct device *dev, pm_message_t mesg)
++{
++ struct samosa_driver *pdrv = to_samosa_driver(dev->driver);
++ struct samosa_device *pdev = to_samosa_device(dev);
++ int ret = 0;
++
++ if (dev->driver && pdrv->suspend)
++ ret = pdrv->suspend(pdev, mesg);
++
++ return ret;
++}
++
++static int samosa_legacy_suspend_late(struct device *dev, pm_message_t mesg)
++{
++ struct samosa_driver *pdrv = to_samosa_driver(dev->driver);
++ struct samosa_device *pdev = to_samosa_device(dev);
++ int ret = 0;
++
++ if (dev->driver && pdrv->suspend_late)
++ ret = pdrv->suspend_late(pdev, mesg);
++
++ return ret;
++}
++
++static int samosa_legacy_resume_early(struct device *dev)
++{
++ struct samosa_driver *pdrv = to_samosa_driver(dev->driver);
++ struct samosa_device *pdev = to_samosa_device(dev);
++ int ret = 0;
++
++ if (dev->driver && pdrv->resume_early)
++ ret = pdrv->resume_early(pdev);
++
++ return ret;
++}
++
++static int samosa_legacy_resume(struct device *dev)
++{
++ struct samosa_driver *pdrv = to_samosa_driver(dev->driver);
++ struct samosa_device *pdev = to_samosa_device(dev);
++ int ret = 0;
++
++ if (dev->driver && pdrv->resume)
++ ret = pdrv->resume(pdev);
++
++ return ret;
++}
++
++static int samosa_pm_prepare(struct device *dev)
++{
++ struct device_driver *drv = dev->driver;
++ int ret = 0;
++
++ if (drv && drv->pm && drv->pm->prepare)
++ ret = drv->pm->prepare(dev);
++
++ return ret;
++}
++
++static void samosa_pm_complete(struct device *dev)
++{
++ struct device_driver *drv = dev->driver;
++
++ if (drv && drv->pm && drv->pm->complete)
++ drv->pm->complete(dev);
++}
++
++
++#ifdef CONFIG_SUSPEND
++
++static int samosa_pm_suspend(struct device *dev)
++{
++ struct device_driver *drv = dev->driver;
++ int ret = 0;
++
++ if (!drv)
++ return 0;
++
++ if (drv->pm) {
++ if (drv->pm->suspend)
++ ret = drv->pm->suspend(dev);
++ } else {
++ ret = samosa_legacy_suspend(dev, PMSG_SUSPEND);
++ }
++
++ return ret;
++}
++
++static int samosa_pm_suspend_noirq(struct device *dev)
++{
++ struct device_driver *drv = dev->driver;
++ int ret = 0;
++
++ if (!drv)
++ return 0;
++
++ if (drv->pm) {
++ if (drv->pm->suspend_noirq)
++ ret = drv->pm->suspend_noirq(dev);
++ } else {
++ ret = samosa_legacy_suspend_late(dev, PMSG_SUSPEND);
++ }
++
++ return ret;
++}
++
++static int samosa_pm_resume(struct device *dev)
++{
++ struct device_driver *drv = dev->driver;
++ int ret = 0;
++
++ if (!drv)
++ return 0;
++
++ if (drv->pm) {
++ if (drv->pm->resume)
++ ret = drv->pm->resume(dev);
++ } else {
++ ret = samosa_legacy_resume(dev);
++ }
++
++ return ret;
++}
++
++static int samosa_pm_resume_noirq(struct device *dev)
++{
++ struct device_driver *drv = dev->driver;
++ int ret = 0;
++
++ if (!drv)
++ return 0;
++
++ if (drv->pm) {
++ if (drv->pm->resume_noirq)
++ ret = drv->pm->resume_noirq(dev);
++ } else {
++ ret = samosa_legacy_resume_early(dev);
++ }
++
++ return ret;
++}
++
++#else /* !CONFIG_SUSPEND */
++
++#define samosa_pm_suspend NULL
++#define samosa_pm_resume NULL
++#define samosa_pm_suspend_noirq NULL
++#define samosa_pm_resume_noirq NULL
++
++#endif /* !CONFIG_SUSPEND */
++
++#ifdef CONFIG_HIBERNATION
++
++static int samosa_pm_freeze(struct device *dev)
++{
++ struct device_driver *drv = dev->driver;
++ int ret = 0;
++
++ if (!drv)
++ return 0;
++
++ if (drv->pm) {
++ if (drv->pm->freeze)
++ ret = drv->pm->freeze(dev);
++ } else {
++ ret = samosa_legacy_suspend(dev, PMSG_FREEZE);
++ }
++
++ return ret;
++}
++
++static int samosa_pm_freeze_noirq(struct device *dev)
++{
++ struct device_driver *drv = dev->driver;
++ int ret = 0;
++
++ if (!drv)
++ return 0;
++
++ if (drv->pm) {
++ if (drv->pm->freeze_noirq)
++ ret = drv->pm->freeze_noirq(dev);
++ } else {
++ ret = samosa_legacy_suspend_late(dev, PMSG_FREEZE);
++ }
++
++ return ret;
++}
++
++static int samosa_pm_thaw(struct device *dev)
++{
++ struct device_driver *drv = dev->driver;
++ int ret = 0;
++
++ if (!drv)
++ return 0;
++
++ if (drv->pm) {
++ if (drv->pm->thaw)
++ ret = drv->pm->thaw(dev);
++ } else {
++ ret = samosa_legacy_resume(dev);
++ }
++
++ return ret;
++}
++
++static int samosa_pm_thaw_noirq(struct device *dev)
++{
++ struct device_driver *drv = dev->driver;
++ int ret = 0;
++
++ if (!drv)
++ return 0;
++
++ if (drv->pm) {
++ if (drv->pm->thaw_noirq)
++ ret = drv->pm->thaw_noirq(dev);
++ } else {
++ ret = samosa_legacy_resume_early(dev);
++ }
++
++ return ret;
++}
++
++static int samosa_pm_poweroff(struct device *dev)
++{
++ struct device_driver *drv = dev->driver;
++ int ret = 0;
++
++ if (!drv)
++ return 0;
++
++ if (drv->pm) {
++ if (drv->pm->poweroff)
++ ret = drv->pm->poweroff(dev);
++ } else {
++ ret = samosa_legacy_suspend(dev, PMSG_HIBERNATE);
++ }
++
++ return ret;
++}
++
++static int samosa_pm_poweroff_noirq(struct device *dev)
++{
++ struct device_driver *drv = dev->driver;
++ int ret = 0;
++
++ if (!drv)
++ return 0;
++
++ if (drv->pm) {
++ if (drv->pm->poweroff_noirq)
++ ret = drv->pm->poweroff_noirq(dev);
++ } else {
++ ret = samosa_legacy_suspend_late(dev, PMSG_HIBERNATE);
++ }
++
++ return ret;
++}
++
++static int samosa_pm_restore(struct device *dev)
++{
++ struct device_driver *drv = dev->driver;
++ int ret = 0;
++
++ if (!drv)
++ return 0;
++
++ if (drv->pm) {
++ if (drv->pm->restore)
++ ret = drv->pm->restore(dev);
++ } else {
++ ret = samosa_legacy_resume(dev);
++ }
++
++ return ret;
++}
++
++static int samosa_pm_restore_noirq(struct device *dev)
++{
++ struct device_driver *drv = dev->driver;
++ int ret = 0;
++
++ if (!drv)
++ return 0;
++
++ if (drv->pm) {
++ if (drv->pm->restore_noirq)
++ ret = drv->pm->restore_noirq(dev);
++ } else {
++ ret = samosa_legacy_resume_early(dev);
++ }
++
++ return ret;
++}
++
++#else /* !CONFIG_HIBERNATION */
++
++#define samosa_pm_freeze NULL
++#define samosa_pm_thaw NULL
++#define samosa_pm_poweroff NULL
++#define samosa_pm_restore NULL
++#define samosa_pm_freeze_noirq NULL
++#define samosa_pm_thaw_noirq NULL
++#define samosa_pm_poweroff_noirq NULL
++#define samosa_pm_restore_noirq NULL
++
++#endif /* !CONFIG_HIBERNATION */
++
++static struct dev_pm_ops samosa_dev_pm_ops = {
++ .prepare = samosa_pm_prepare,
++ .complete = samosa_pm_complete,
++ .suspend = samosa_pm_suspend,
++ .resume = samosa_pm_resume,
++ .freeze = samosa_pm_freeze,
++ .thaw = samosa_pm_thaw,
++ .poweroff = samosa_pm_poweroff,
++ .restore = samosa_pm_restore,
++ .suspend_noirq = samosa_pm_suspend_noirq,
++ .resume_noirq = samosa_pm_resume_noirq,
++ .freeze_noirq = samosa_pm_freeze_noirq,
++ .thaw_noirq = samosa_pm_thaw_noirq,
++ .poweroff_noirq = samosa_pm_poweroff_noirq,
++ .restore_noirq = samosa_pm_restore_noirq,
++};
++
++#define SAMOSA_PM_OPS_PTR (&samosa_dev_pm_ops)
++
++#else /* !CONFIG_PM_SLEEP */
++
++#define SAMOSA_PM_OPS_PTR NULL
++
++#endif /* !CONFIG_PM_SLEEP */
++
++struct bus_type samosa_bus_type = {
++
++ .name = "samosa",
++ .dev_attrs = samosa_dev_attrs,
++ .match = samosa_match,
++ .uevent = samosa_uevent,
++ .pm = SAMOSA_PM_OPS_PTR,
++};
++EXPORT_SYMBOL_GPL(samosa_bus_type);
++
++#ifdef CONFIG_PROC_SAMOSA
++#define PROC_SAMOSA "samosa"
++static ssize_t proc_read_samosa(struct file *file, char *buf,
++ size_t nbytes, loff_t *ppos) {
++ int count = 0;
++ return count;
++}
++
++static ssize_t proc_write_samosa(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos) {
++ unsigned long samosa_addr;
++ unsigned long samosa_data;
++ char buf[40];
++ char *p = buf;
++ char *pp;
++
++ if (count >= (sizeof(buf) -1 ))
++ return -EFAULT;
++
++ if (copy_from_user(buf, buffer, count))
++ return -EFAULT;
++
++ buf[count] = 0;
++ while (isspace(*p))
++ p++;
++ samosa_addr = simple_strtoul(p,&pp,0);
++ if (pp && (pp > p)) {
++ p = pp;
++ while (isspace(*p))
++ p++;
++ samosa_data = simple_strtoul(p,&pp,0);
++ if (pp && (pp > p))
++ samosa_write8(samosa_addr, samosa_data);
++ else
++ pr_info("cannot parse data from <%s> address = 0x%lx\n",p,samosa_addr);
++ }
++ else
++ pr_info("cannot parse address from start of <%s>\n",buf);
++ return count;
++}
++
++static struct file_operations proc_samosa_operations = {
++ read: proc_read_samosa,
++ write: proc_write_samosa
++};
++
++static struct proc_dir_entry *proc_samosa;
++#endif
++
++static int __init samosa_bus_init(void)
++{
++ int error;
++
++ pr_info("Samosa device registration\n");
++ error = device_register(&samosa_bus);
++ if (error)
++ return error;
++ pr_info("Samosa bus registration\n");
++ error = bus_register(&samosa_bus_type);
++ if (error)
++ device_unregister(&samosa_bus);
++ if (!error) {
++ unsigned int ver;
++ set_irq_type(BALLOON3_FPGA_IRQ, IRQ_TYPE_EDGE_RISING);
++ pr_info("Samosa services initialised.\n");
++ ver = BALLOON3_VERSION_REG;
++ pr_info("VHDL logic version (memread):%08X\n", ver);
++#ifdef CONFIG_PROC_SAMOSA
++ proc_samosa = create_proc_entry(PROC_SAMOSA, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_samosa)
++ proc_samosa->proc_fops = &proc_samosa_operations;
++#endif
++ }
++ else
++ pr_info("Samosa services initialisation failed\n");
++ return error;
++}
++
++static void __exit samosa_bus_remove(void)
++{
++#ifdef CONFIG_PROC_SAMOSA
++ remove_proc_entry(PROC_SAMOSA, NULL);
++#endif
++
++ bus_unregister(&samosa_bus_type);
++ device_unregister(&samosa_bus);
++}
++
++module_init(samosa_bus_init);
++module_exit(samosa_bus_remove);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Nick Bane <nick@cecomputing.co.uk>");
++MODULE_DESCRIPTION("samosa bus interface\n");
+Index: linux-2.6.34/include/linux/samosa.h
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.34/include/linux/samosa.h 2010-05-23 11:07:15.000000000 +0100
+@@ -0,0 +1,58 @@
++/*
++ * drivers/char/samosa.h
++ * Author: Nick Bane
++ * Created: May 2005
++ * Copyright: Toby Churchill Ltd
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ */
++
++#ifndef _SAMOSA_H_
++#define _SAMOSA_H_
++
++#include "linux/device.h"
++#include "linux/interrupt.h"
++
++struct samosa_device {
++ const char *name;
++ int id;
++ struct device dev;
++};
++
++#define to_samosa_device(x) container_of((x), struct samosa_device, dev)
++
++extern int samosa_device_register(struct samosa_device *dev);
++extern void samosa_device_unregister(struct samosa_device *dev);
++
++extern struct bus_type samosa_bus_type;
++extern struct device samosa_bus;
++
++extern struct samosa_device *samosa_device_register_simple(const char *, int id);
++
++struct samosa_driver {
++ int (*probe)(struct samosa_device *);
++ int (*remove)(struct samosa_device *);
++ void (*shutdown)(struct samosa_device *);
++ int (*suspend)(struct samosa_device *, pm_message_t state);
++ int (*suspend_late)(struct samosa_device *, pm_message_t state);
++ int (*resume_early)(struct samosa_device *);
++ int (*resume)(struct samosa_device *);
++ struct device_driver driver;
++};
++
++extern int samosa_driver_register(struct samosa_driver *);
++extern void samosa_driver_unregister(struct samosa_driver *);
++
++#define samosa_get_drvdata(_dev) dev_get_drvdata(&(_dev)->dev)
++#define samosa_set_drvdata(_dev, data) dev_set_drvdata(&(_dev)->dev, (data))
++
++/* samosa bus access functions */
++extern int samosa_read8(unsigned char reg);
++extern void samosa_write8(unsigned char reg, unsigned char value);
++extern void samosa_write_block8(unsigned char reg, const unsigned char *value, unsigned int count);
++extern void samosa_write_repeat8(unsigned char reg, unsigned char value, unsigned int count);
++extern int samosa_sm_present(void);
++
++#endif
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-sl40.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-sl40.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-sl40.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,404 @@
+Index: linux-2.6.34/arch/arm/mach-pxa/include/mach/balloon3.h
+===================================================================
+--- linux-2.6.34.orig/arch/arm/mach-pxa/include/mach/balloon3.h 2010-05-23 11:18:02.000000000 +0100
++++ linux-2.6.34/arch/arm/mach-pxa/include/mach/balloon3.h 2010-05-23 11:31:46.000000000 +0100
+@@ -123,6 +123,8 @@
+ #define CPLD_SERIAL_LPR_CTS_BIT 3
+ #define CPLD_SERIAL_TC232_CTS_BIT 4
+ #define CPLD_SERIAL_TC232_DSR_BIT 5
++#define CPLD_SERIAL_GSM_RTS_BIT 6
++#define CPLD_SERIAL_GSM_DSR_BIT 7
+
+ #define CPLD_SROUTING_SET 0x0b
+ #define CPLD_SROUTING_CLR 0x1b
+Index: linux-2.6.34/drivers/serial/pxa.c
+===================================================================
+--- linux-2.6.34.orig/drivers/serial/pxa.c 2010-05-23 11:18:02.000000000 +0100
++++ linux-2.6.34/drivers/serial/pxa.c 2010-05-23 11:31:24.000000000 +0100
+@@ -24,6 +24,53 @@
+ * with the serial core maintainer satisfaction to appear soon.
+ */
+
++// gsm modem control line support
++//#define POLL_GSM_CTS
++
++#include "linux/samosa.h"
++#if defined(CONFIG_MACH_BALLOON2)
++#include <mach/balloon2.h>
++#endif
++#if defined(CONFIG_MACH_BALLOON3)
++#include <mach/balloon3.h>
++#endif
++
++#ifdef POLL_GSM_CTS
++#include "linux/kthread.h"
++struct task_struct *poll_gsm_cts_task;
++#endif
++
++static void gsm_uart_enable_dtr(void) {
++ samosa_write8(CPLD_SERIAL_CLR, 1 << CPLD_SERIAL_GSM_DTR_BIT);
++ pr_debug("%s: FFUART enable dtr done\n",__FUNCTION__);
++}
++
++static void gsm_uart_disable_dtr(void) {
++ samosa_write8(CPLD_SERIAL_SET, 1 << CPLD_SERIAL_GSM_DTR_BIT);
++ pr_debug("%s: FFUART disable dtr done\n",__FUNCTION__);
++}
++
++static void gsm_uart_enable_rts(void) {
++ samosa_write8(CPLD_SERIAL_CLR, 1 << CPLD_SERIAL_GSM_RTS_BIT);
++ pr_debug("%s: FFUART enable rts done\n",__FUNCTION__);
++}
++
++static void gsm_uart_disable_rts(void) {
++ samosa_write8(CPLD_SERIAL_SET, 1 << CPLD_SERIAL_GSM_RTS_BIT);
++ pr_debug("%s: FFUART disable rts done\n",__FUNCTION__);
++}
++
++static int gsm_uart_delta_cts;
++static int gsm_uart_last_cts;
++
++static int gsm_uart_get_cts(void) {
++ unsigned char serial_status = samosa_read8(CPLD_SERIAL_SET);
++ int gsm_uart_cts = (serial_status & ( 1 << CPLD_SERIAL_GSM_CTS_BIT)) ? 0:1;
++ if (gsm_uart_last_cts != gsm_uart_cts)
++ gsm_uart_delta_cts = 1;
++ gsm_uart_last_cts = gsm_uart_cts;
++ return gsm_uart_last_cts;
++}
+
+ #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
+ #define SUPPORT_SYSRQ
+@@ -38,6 +85,7 @@
+ #include <linux/circ_buf.h>
+ #include <linux/delay.h>
+ #include <linux/interrupt.h>
++#include <linux/irq.h>
+ #include <linux/platform_device.h>
+ #include <linux/tty.h>
+ #include <linux/tty_flip.h>
+@@ -46,6 +94,9 @@
+ #include <linux/io.h>
+ #include <linux/slab.h>
+
++#include <mach/hardware.h>
++#include <mach/regs-uart.h>
++
+ struct uart_pxa_port {
+ struct uart_port port;
+ unsigned char ier;
+@@ -160,6 +211,19 @@
+ tty_flip_buffer_push(tty);
+ }
+
++static inline int tx_empty(struct uart_pxa_port *up) {
++ struct circ_buf *xmit = &up->port.state->xmit;
++ return uart_circ_empty(xmit);
++}
++
++static inline int tx_pending(struct uart_pxa_port *up) {
++ return !tx_empty(up);
++}
++
++static inline int tx_stopped(struct uart_pxa_port *up) {
++ return uart_tx_stopped(&up->port);
++}
++
+ static void transmit_chars(struct uart_pxa_port *up)
+ {
+ struct circ_buf *xmit = &up->port.state->xmit;
+@@ -171,6 +235,7 @@
+ up->port.x_char = 0;
+ return;
+ }
++
+ if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
+ serial_pxa_stop_tx(&up->port);
+ return;
+@@ -188,9 +253,11 @@
+ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+ uart_write_wakeup(&up->port);
+
+-
+ if (uart_circ_empty(xmit))
+ serial_pxa_stop_tx(&up->port);
++
++ if (up->port.mapbase == __PREG(FFUART))
++ pr_debug("%s: FFUART tx data complete\n",__FUNCTION__);
+ }
+
+ static void serial_pxa_start_tx(struct uart_port *port)
+@@ -209,6 +276,17 @@
+
+ status = serial_in(up, UART_MSR);
+
++ // update status with changes in gsm cts
++ if (up->port.mapbase == __PREG(FFUART)) {
++ gsm_uart_get_cts();
++ if (gsm_uart_delta_cts) {
++ gsm_uart_delta_cts = 0;
++ status |= UART_MSR_DCTS;
++ }
++ if (gsm_uart_last_cts)
++ status |= UART_MSR_CTS;
++ }
++
+ if ((status & UART_MSR_ANY_DELTA) == 0)
+ return;
+
+@@ -224,6 +302,30 @@
+ wake_up_interruptible(&up->port.state->port.delta_msr_wait);
+ }
+
++#ifdef POLL_GSM_CTS
++static int poll_gsm_cts_thread(void *data) {
++ struct uart_pxa_port *up = (struct uart_pxa_port *)data;
++ while (!kthread_should_stop()) {
++ unsigned long flags;
++ int poll_fast = 0;
++ spin_lock_irqsave(&up->port.lock, flags);
++ check_modem_status(up);
++ // if cts false
++ if (!gsm_uart_last_cts) {
++ struct circ_buf *xmit = &up->port.info->xmit;
++ // and something waiting, poll fast
++ if (!uart_circ_empty(xmit))
++ poll_fast = 1;
++ }
++ spin_unlock_irqrestore(&up->port.lock, flags);
++ if (!poll_fast)
++ msleep(250);
++ }
++ pr_debug("%s: FFUART poll cts thread exit\n",__FUNCTION__);
++ return 0;
++}
++#endif
++
+ /*
+ * This handles the interrupt from one port.
+ */
+@@ -244,6 +346,25 @@
+ return IRQ_HANDLED;
+ }
+
++/*
++ * This handles the interrupt from samosa associated with the gsm_uart
++ */
++static inline irqreturn_t serial_gsm_irq(int irq, void *dev_id)
++{
++ unsigned int lsr;
++ struct uart_pxa_port *up = dev_id;
++ lsr = serial_in(up, UART_LSR);
++ gsm_uart_delta_cts = 1;
++ // this is required to clear the interrupt
++ gsm_uart_get_cts();
++ // sets the start/stop tx
++ check_modem_status(up);
++ if (lsr & UART_LSR_THRE)
++ transmit_chars(up);
++// pr_debug("#");
++ return IRQ_HANDLED;
++}
++
+ static unsigned int serial_pxa_tx_empty(struct uart_port *port)
+ {
+ struct uart_pxa_port *up = (struct uart_pxa_port *)port;
+@@ -270,10 +391,29 @@
+ ret |= TIOCM_CAR;
+ if (status & UART_MSR_RI)
+ ret |= TIOCM_RNG;
+- if (status & UART_MSR_DSR)
+- ret |= TIOCM_DSR;
+- if (status & UART_MSR_CTS)
+- ret |= TIOCM_CTS;
++ if (up->port.mapbase == __PREG(FFUART)) {
++ unsigned char serial_status = samosa_read8(CPLD_SERIAL_SET);
++ if ((serial_status & ( 1 << CPLD_SERIAL_GSM_DSR_BIT)) == 0) {
++ ret |= TIOCM_DSR;
++ pr_debug("%s: FFUART DSR active\n",__FUNCTION__);
++ }
++ else
++ pr_debug("%s: FFUART DSR inactive\n",__FUNCTION__);
++ // clear delta cts flag
++ gsm_uart_delta_cts = 0;
++ if (gsm_uart_get_cts()) {
++ ret |= TIOCM_CTS;
++ pr_debug("%s: FFUART CTS active\n",__FUNCTION__);
++ }
++ else
++ pr_debug("%s: FFUART CTS inactive\n",__FUNCTION__);
++ }
++ else {
++ if (status & UART_MSR_DSR)
++ ret |= TIOCM_DSR;
++ if (status & UART_MSR_CTS)
++ ret |= TIOCM_CTS;
++ }
+ return ret;
+ }
+
+@@ -296,8 +436,20 @@
+ mcr |= up->mcr;
+
+ serial_out(up, UART_MCR, mcr);
++
++ if (up->port.mapbase == __PREG(FFUART)) {
++ if (mcr & UART_MCR_DTR)
++ gsm_uart_enable_dtr();
++ else
++ gsm_uart_disable_dtr();
++ if (mcr & UART_MCR_RTS)
++ gsm_uart_enable_rts();
++ else
++ gsm_uart_disable_rts();
++ }
+ }
+
++
+ static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
+ {
+ struct uart_pxa_port *up = (struct uart_pxa_port *)port;
+@@ -358,6 +510,19 @@
+ return retval;
+
+ /*
++ * Allocate the samosa IRQ
++ */
++ if (up->port.mapbase == __PREG(FFUART)) {
++ retval = request_irq(BALLOON3_FPGA_IRQ, serial_gsm_irq, 0, "FPGA", up);
++ if (retval) {
++ pr_debug("%s: cannot obtain fpga irq\n",__FUNCTION__);
++ return retval;
++ }
++ set_irq_type(BALLOON3_FPGA_IRQ, IRQ_TYPE_EDGE_BOTH);
++ pr_info("%s: fpga irq obtained\n",__FUNCTION__);
++ }
++
++ /*
+ * Clear the FIFO buffers and disable them.
+ * (they will be reenabled in set_termios())
+ */
+@@ -400,6 +565,16 @@
+ (void) serial_in(up, UART_IIR);
+ (void) serial_in(up, UART_MSR);
+
++#ifdef POLL_GSM_CTS
++ if (up->port.mapbase == __PREG(FFUART)) {
++ poll_gsm_cts_task = kthread_create(poll_gsm_cts_thread, up, "%s", "poll_gsm_cts_thread");
++ if (poll_gsm_cts_task) {
++ wake_up_process(poll_gsm_cts_task);
++ pr_debug("%s: FFUART CTS polling started\n",__FUNCTION__);
++ }
++ }
++#endif
++
+ return 0;
+ }
+
+@@ -410,6 +585,14 @@
+
+ free_irq(up->port.irq, up);
+
++ if (up->port.mapbase == __PREG(FFUART)) {
++#ifdef POLL_GSM_CTS
++ kthread_stop(poll_gsm_cts_task);
++#endif
++ free_irq(BALLOON3_FPGA_IRQ, up);
++ pr_debug("%s: fpga irq released\n",__FUNCTION__);
++ }
++
+ /*
+ * Disable interrupts from this port
+ */
+@@ -531,10 +714,16 @@
+
+ serial_out(up, UART_IER, up->ier);
+
+- if (termios->c_cflag & CRTSCTS)
++ if (termios->c_cflag & CRTSCTS) {
+ up->mcr |= UART_MCR_AFE;
+- else
++ if (up->port.mapbase == __PREG(FFUART))
++ pr_debug("%s: CRTSCTS hardware handshaking set\n",__FUNCTION__);
++ }
++ else {
+ up->mcr &= ~UART_MCR_AFE;
++ if (up->port.mapbase == __PREG(FFUART))
++ pr_debug("%s: no CRTSCTS handshaking set\n",__FUNCTION__);
++ }
+
+ serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
+ serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
+@@ -560,10 +749,16 @@
+ {
+ struct uart_pxa_port *up = (struct uart_pxa_port *)port;
+
+- if (!state)
++ if (!state) {
+ clk_enable(up->clk);
+- else
++ if (up->port.mapbase == __PREG(FFUART))
++ gsm_uart_enable_rts();
++ }
++ else {
++ if (up->port.mapbase == __PREG(FFUART))
++ gsm_uart_disable_rts();
+ clk_disable(up->clk);
++ }
+ }
+
+ static void serial_pxa_release_port(struct uart_port *port)
+@@ -726,6 +921,7 @@
+ .verify_port = serial_pxa_verify_port,
+ };
+
++
+ static struct uart_driver serial_pxa_reg = {
+ .owner = THIS_MODULE,
+ .driver_name = "PXA serial",
+@@ -741,8 +937,11 @@
+ {
+ struct uart_pxa_port *sport = dev_get_drvdata(dev);
+
+- if (sport)
++ if (sport) {
+ uart_suspend_port(&serial_pxa_reg, &sport->port);
++ if (sport->port.mapbase == __PREG(FFUART))
++ gsm_uart_disable_rts();
++ }
+
+ return 0;
+ }
+@@ -751,8 +950,11 @@
+ {
+ struct uart_pxa_port *sport = dev_get_drvdata(dev);
+
+- if (sport)
++ if (sport) {
+ uart_resume_port(&serial_pxa_reg, &sport->port);
++ if (sport->port.mapbase == __PREG(FFUART))
++ gsm_uart_enable_rts();
++ }
+
+ return 0;
+ }
+Index: linux-2.6.34-rc7/arch/arm/mach-pxa/balloon3.c
+===================================================================
+--- linux-2.6.34-rc7.orig/arch/arm/mach-pxa/balloon3.c 2010-05-15 10:36:27.000000000 +0100
++++ linux-2.6.34-rc7/arch/arm/mach-pxa/balloon3.c 2010-05-15 10:36:44.000000000 +0100
+@@ -326,6 +326,15 @@
+
+ pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_pin_config));
+
++#ifdef CONFIG_SL40
++ // set ac97 bus controller to hold codec in reset
++ // needed to clobber whine on sl40
++ GCR &= GCR_COLD_RST; /* clear everything but nCRST */
++ pr_info("Initialising Balloon3\n");
++ GCR &= ~GCR_COLD_RST; /* then assert nCRST */
++ pr_info("Adding support for sl40\n");
++#endif
++
+ platform_device_register(&balloon3led_device);
+ }
+
\ No newline at end of file
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-tsl2560.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-tsl2560.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-tsl2560.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,587 @@
+Index: linux-2.6.29.1/drivers/char/Kconfig
+===================================================================
+--- linux-2.6.29.1.orig/drivers/char/Kconfig 2009-09-03 07:35:19.000000000 +0100
++++ linux-2.6.29.1/drivers/char/Kconfig 2009-09-03 07:35:19.000000000 +0100
+@@ -673,6 +673,13 @@
+ help
+ Densitron LMR5428 LCD display driven down Samosa bus (for Balloonboard).
+
++config TSL2560
++ tristate "TSL2560 Light sensor"
++ depends on SAMOSA
++ default m
++ help
++ TSL2560 light sensor driven down Samosa bus (for Balloonboard).
++
+ config HVCS
+ tristate "IBM Hypervisor Virtual Console Server support"
+ depends on PPC_PSERIES
+Index: linux-2.6.29.1/drivers/char/Makefile
+===================================================================
+--- linux-2.6.29.1.orig/drivers/char/Makefile 2009-09-03 07:35:19.000000000 +0100
++++ linux-2.6.29.1/drivers/char/Makefile 2009-09-03 07:35:19.000000000 +0100
+@@ -113,6 +113,7 @@
+
+ obj-$(CONFIG_SAMOSA) += samosa.o
+ obj-$(CONFIG_LMR5428) += lmr5428.o
++obj-$(CONFIG_TSL2560) += tsl2560.o
+
+ # Files generated that shall be removed upon make clean
+ clean-files := consolemap_deftbl.c defkeymap.c
+Index: linux-2.6.29.1/drivers/char/tsl2560.c
+===================================================================
+--- /dev/null 1970-01-01 00:00:00.000000000 +0000
++++ linux-2.6.29.1/drivers/char/tsl2560.c 2009-09-03 07:40:13.000000000 +0100
+@@ -0,0 +1,552 @@
++/*
++ * linux/drivers/char/tsl2560.c
++ *
++ * file interface for Taos TSL2560 light sensor on the balloon samosa bus
++ * Copyright (c) Chris Jones, Martin-Jones Technology Ltd 2009
++ *
++*/
++
++#include <linux/module.h>
++#include <linux/init.h>
++#include <linux/fs.h>
++#include <linux/uaccess.h>
++
++#if defined(CONFIG_MACH_BALLOON2)
++#include <mach/balloon2.h>
++#endif
++#if defined(CONFIG_MACH_BALLOON3)
++#include <mach/balloon3.h>
++#endif
++#include <asm/cacheflush.h>
++
++#include <linux/delay.h>
++#include <linux/device.h>
++#include <linux/proc_fs.h>
++#include <linux/vmalloc.h>
++#include <linux/platform_device.h>
++#include <linux/spinlock.h>
++#include "linux/cdev.h"
++#include <linux/samosa.h>
++
++#define SAMOSA_I2C_ADDR_SET 0x06
++#define SAMOSA_I2C_ADDR_CLEAR 0x86
++#define SAMOSA_I2C_ADDR_READ 0x06
++#define I2C_SCL_MASK (1<<6)
++#define I2C_SDA_WRITE_MASK (1<<7)
++#define I2C_SDA_READ_MASK (1<<7)
++
++#define I2C_SDA_SET samosa_write8(SAMOSA_I2C_ADDR_SET,I2C_SDA_WRITE_MASK)
++#define I2C_SDA_CLEAR samosa_write8(SAMOSA_I2C_ADDR_CLEAR,I2C_SDA_WRITE_MASK)
++#define I2C_SCL_SET samosa_write8(SAMOSA_I2C_ADDR_SET,I2C_SCL_MASK)
++#define I2C_SCL_CLEAR samosa_write8(SAMOSA_I2C_ADDR_CLEAR,I2C_SCL_MASK)
++#define I2C_SDA_READ (samosa_read8(SAMOSA_I2C_ADDR_READ)&I2C_SDA_READ_MASK)
++
++/* this corresponds to the ADDR SEL pin being grounded */
++/* note that I2C addresses are only bits 7..1 because bit 0 is R/nW */
++#define TSL2560_I2C_ADDRESS 0x52
++#define TSL2560_I2C_ADDRESS_WRITE (TSL2560_I2C_ADDRESS)
++#define TSL2560_I2C_ADDRESS_READ (TSL2560_I2C_ADDRESS | 0x01)
++
++#define TSL2560_REG_CONTROL 0x00
++#define TSL2560_REG_TIMING 0x01
++#define TSL2560_REG_THRESHLOWLOW 0x02
++#define TSL2560_REG_THRESHLOWHIGH 0x03
++#define TSL2560_REG_THRESHHIGHLOW 0x04
++#define TSL2560_REG_THRESHHIGHHIGH 0x05
++#define TSL2560_REG_INTERRUPT 0x06
++#define TSL2560_REG_ID 0x0a
++#define TSL2560_REG_DATA0LOW 0x0c
++#define TSL2560_REG_DATA0HIGH 0x0d
++#define TSL2560_REG_DATA1LOW 0x0e
++#define TSL2560_REG_DATA1HIGH 0x0f
++
++/* character device start number */
++static dev_t dev;
++
++static spinlock_t tsl2560_lock;
++
++/* tsl2560 per device data */
++static struct tsl2560_dev {
++ struct cdev cdev;
++} tsl2560;
++
++/* I2C functions */
++static void i2c_clock_pulse(void);
++static unsigned char i2c_clock_pulse_read(void);
++static void i2c_write_byte (unsigned char data);
++static unsigned char i2c_read_byte (void);
++static void i2c_start(void);
++static void i2c_ack(void);
++static void i2c_nak(void);
++static void i2c_stop(void);
++static unsigned char i2c_read_ack(void);
++
++static void tsl2560_write_cmd_byte(unsigned char command, unsigned char data);
++static unsigned char tsl2560_read_cmd_byte(unsigned char command);
++static void tsl2560_write_cmd_word(unsigned char command, unsigned int data);
++static unsigned int tsl2560_read_cmd_word(unsigned char command);
++
++static void tsl2560_init_hardware(void);
++static unsigned char tsl2560_id(void);
++static unsigned int tsl2560_channel0(void);
++static unsigned int tsl2560_channel1(void);
++
++static void i2c_clock_pulse(void) {
++ I2C_SCL_SET;
++ udelay(10);
++ I2C_SCL_CLEAR;
++ udelay(10);
++}
++
++static unsigned char i2c_clock_pulse_read(void) {
++ unsigned char b;
++
++ I2C_SCL_CLEAR;
++ udelay(1);
++ I2C_SDA_SET;
++ udelay(9);
++ I2C_SCL_SET;
++ udelay(1);
++ b=I2C_SDA_READ;
++ udelay(9);
++// pr_info("%s: %d\n",__func__,b);
++ I2C_SCL_CLEAR;
++ return b;
++}
++
++static void i2c_write_byte (unsigned char data) {
++ int n;
++
++ for(n=0;n<8;n++) {
++ I2C_SCL_CLEAR;
++ udelay(1);
++ if(data&0x80) {
++// pr_info("%s: 1\n",__func__);
++ I2C_SDA_SET;
++ } else {
++// pr_info("%s: 0\n",__func__);
++ I2C_SDA_CLEAR;
++ }
++ udelay(9);
++ I2C_SCL_SET;
++ udelay(10);
++ data<<=1;
++ }
++}
++
++static unsigned char i2c_read_byte (void){
++ int n;
++ unsigned char data=0;
++
++ for(n=0;n<8;n++) {
++ data|=i2c_clock_pulse_read()?0x01:0;
++ data<<=1;
++ }
++
++ return data;
++}
++
++static void i2c_start(void){
++// pr_info("%s\n",__func__);
++ I2C_SDA_SET;
++ udelay(1);
++ I2C_SCL_SET;
++ udelay(20);
++ I2C_SDA_CLEAR;
++ udelay(10);
++}
++
++static void i2c_ack(void) {
++// pr_info("%s\n",__func__);
++ I2C_SCL_CLEAR;
++ udelay(1);
++ I2C_SDA_CLEAR;
++ udelay(9);
++ I2C_SCL_SET;
++ udelay(20);
++ I2C_SCL_CLEAR;
++}
++
++static void i2c_nak(void) {
++// pr_info("%s\n",__func__);
++ I2C_SCL_CLEAR;
++ udelay(1);
++ I2C_SDA_SET;
++ udelay(9);
++ I2C_SCL_SET;
++ udelay(10);
++ I2C_SCL_CLEAR;
++}
++
++static void i2c_stop(void) {
++// pr_info("%s\n",__func__);
++ I2C_SDA_CLEAR;
++ udelay(1);
++ I2C_SCL_SET;
++ udelay(10);
++ I2C_SDA_SET;
++ udelay(10);
++}
++
++static unsigned char i2c_read_ack(void) {
++ unsigned char b;
++
++ I2C_SCL_CLEAR;
++ udelay(1);
++ I2C_SDA_SET;
++ udelay(9);
++ I2C_SCL_SET;
++ udelay(1);
++ b=I2C_SDA_READ;
++ udelay(20);
++// pr_info("%s: %d\n",__func__,b);
++ I2C_SCL_CLEAR;
++ udelay(5);
++ return b;
++
++}
++
++static void tsl2560_write_cmd_byte(unsigned char command, unsigned char data) {
++ i2c_start();
++ i2c_write_byte(TSL2560_I2C_ADDRESS_WRITE);
++ i2c_read_ack();
++ i2c_write_byte(command);
++ i2c_read_ack();
++ i2c_write_byte(data);
++ i2c_read_ack();
++ i2c_stop();
++}
++
++static unsigned char tsl2560_read_cmd_byte(unsigned char command) {
++ unsigned char b;
++
++ i2c_start();
++ i2c_write_byte(TSL2560_I2C_ADDRESS_WRITE);
++ i2c_read_ack();
++ i2c_write_byte(command);
++ i2c_read_ack();
++ i2c_start();
++ i2c_write_byte(TSL2560_I2C_ADDRESS_READ);
++ i2c_read_ack();
++ b=i2c_read_byte();
++ i2c_ack();
++ i2c_stop();
++
++ return b;
++}
++
++static void tsl2560_write_cmd_word(unsigned char command, unsigned int data) {
++ i2c_start();
++ i2c_write_byte(TSL2560_I2C_ADDRESS_WRITE);
++ i2c_read_ack();
++ i2c_write_byte(command);
++ i2c_read_ack();
++ i2c_write_byte(data&0xff);
++ i2c_read_ack();
++ i2c_write_byte((data&0xff00)>>8);
++ i2c_read_ack();
++ i2c_stop();
++}
++
++static unsigned int tsl2560_read_cmd_word(unsigned char command) {
++ unsigned int b;
++
++ i2c_start();
++ i2c_write_byte(TSL2560_I2C_ADDRESS_WRITE);
++ i2c_read_ack();
++ i2c_write_byte(command);
++ i2c_read_ack();
++ i2c_start();
++ i2c_write_byte(TSL2560_I2C_ADDRESS_READ);
++ i2c_read_ack();
++ b=i2c_read_byte();
++ i2c_ack();
++ b|=(i2c_read_byte()<<8);
++ i2c_ack();
++ i2c_stop();
++
++ return b;
++}
++
++static void tsl2560_init_hardware(void) {
++ tsl2560_write_cmd_byte(TSL2560_REG_CONTROL,0x03);
++}
++
++static unsigned char tsl2560_id(void) {
++ return tsl2560_read_cmd_byte(TSL2560_REG_ID);
++}
++
++static unsigned int tsl2560_channel0(void) {
++ return tsl2560_read_cmd_word(TSL2560_REG_DATA0LOW);
++}
++
++static unsigned int tsl2560_channel1(void) {
++ return tsl2560_read_cmd_word(TSL2560_REG_DATA1LOW);
++}
++
++static ssize_t tsl2560_read(struct file *, char *, size_t, loff_t *);
++static ssize_t tsl2560_write(struct file *, const char *, size_t, loff_t *);
++static int tsl2560_open(struct inode *, struct file *);
++static int tsl2560_release(struct inode *, struct file *);
++static int tsl2560_ioctl(struct inode *, struct file *, unsigned int, unsigned long);
++static int tsl2560_mmap(struct file *, struct vm_area_struct *vm);
++
++static struct file_operations tsl2560_fops = {
++ read: tsl2560_read,
++ write: tsl2560_write,
++ open: tsl2560_open,
++ release: tsl2560_release,
++ ioctl: tsl2560_ioctl,
++ mmap: tsl2560_mmap,
++};
++
++/* proc interface */
++static ssize_t proc_read_tsl2560(struct file *file, char *buf,
++ size_t nbytes, loff_t *ppos);
++static ssize_t proc_write_tsl2560(struct file *file, const char *buffer,
++ size_t count, loff_t *ppos);
++
++static struct file_operations proc_tsl2560_operations = {
++ read: proc_read_tsl2560,
++ write: proc_write_tsl2560
++};
++static struct proc_dir_entry *proc_tsl2560;
++#define PROC_TSL2560 "tsl2560"
++
++static int tsl2560_open(struct inode *inode, struct file *filp)
++{
++ struct tsl2560_dev *tsl2560_devp;
++
++ if (samosa_sm_present())
++ return -ENODEV;
++
++ tsl2560_devp = container_of(inode->i_cdev, struct tsl2560_dev, cdev);
++ filp->private_data = tsl2560_devp;
++
++ return 0;
++}
++
++static int tsl2560_release(struct inode *inode, struct file *filp)
++{
++ return 0;
++}
++
++static ssize_t tsl2560_read(struct file *filp, char *buf,
++ size_t size, loff_t *offp)
++{
++ char outputbuf[80];
++ int count = 0;
++
++ /* all done in a single read */
++ if (*offp > 0)
++ return 0;
++
++ count += sprintf(&outputbuf[count], "0x%04x 0x%04x\n", tsl2560_channel0(),tsl2560_channel1());
++
++ if (count > size) /* Assume output can be read at one time */
++ return -EINVAL;
++ if (copy_to_user(buf, outputbuf, count))
++ return -EFAULT;
++ *offp += count;
++ return count;
++}
++
++static ssize_t tsl2560_write(struct file *filp, const char *buf,
++ size_t size, loff_t *offp)
++{
++ /* we don't support writing at the moment */
++ return -EINVAL;
++}
++
++/* maybe this will be handy in due course */
++static int tsl2560_ioctl(struct inode *inode, struct file *flip,
++ unsigned int command, unsigned long arg)
++{
++ int err;
++ err = -EINVAL;
++ return err;
++}
++
++static int tsl2560_mmap(struct file *filp, struct vm_area_struct *vma)
++{
++ /*struct tsl2560_dev *mp = (struct tsl2560_dev *)filp->private_data;*/
++
++ return -EINVAL;
++}
++
++
++static int proc_read_tsl2560(struct file *filp, char *buf,
++ size_t nbytes, loff_t *ppos)
++{
++ char outputbuf[512];
++ int count = 0;
++
++ /* all done in a single read */
++ if (*ppos > 0)
++ return 0;
++
++ count += sprintf(&outputbuf[count], "tsl2560: major dev = %d\n", MAJOR(dev));
++
++ if (count > nbytes) /* Assume output can be read at one time */
++ return -EINVAL;
++ if (copy_to_user(buf, outputbuf, count))
++ return -EFAULT;
++ *ppos += count;
++ return count;
++}
++
++static ssize_t proc_write_tsl2560(struct file *filp, const char *buffer,
++ size_t count, loff_t *ppos)
++{
++ /* struct tsl2560_dev *mp= (struct tsl2560_dev *)filp->private_data;
++ * if (strncmp(buff,"reset:",6)==0)
++ * newRegValue = simple_strtoul(buffer,&endp,0);
++ * a bold but simple claim is to have read it all
++ */
++ return count;
++}
++
++
++/* driver initialisation */
++
++static int __init tsl2560_probe(struct samosa_device *pdev)
++{
++#ifndef CONFIG_BALLOON2_BUILD_TCL_PIKEY2
++ /* if smart media present - cpld cannot be so declare invalid */
++ if (samosa_sm_present()) {
++ dev_info(&pdev->dev, "%s: samosa bus not present\n", __func__);
++ return -ENODEV;
++ }
++#endif
++
++
++ tsl2560_init_hardware();
++
++ dev_info(&pdev->dev, "TSL2560 light sensor support installed. Chip ID=0x%02x\n",tsl2560_id());
++
++ return 0;
++}
++
++static int __exit tsl2560_remove(struct samosa_device *dev)
++{
++ samosa_set_drvdata(dev, NULL);
++ return 0;
++}
++
++#ifdef CONFIG_PM
++static int tsl2560_suspend(struct samosa_device *dev, pm_message_t state)
++{
++ return 0;
++}
++
++static int tsl2560_resume(struct samosa_device *dev)
++{
++ return 0;
++}
++#else /* CONFIG_PM */
++#define tsl2560_suspend NULL
++#define tsl2560_resume NULL
++#endif /* CONFIG_PM */
++
++#define tsl2560_shutdown NULL
++
++/* driver definition */
++static struct samosa_driver tsl2560_driver = {
++ .probe = tsl2560_probe,
++ .shutdown = tsl2560_shutdown,
++ .remove = __exit_p(tsl2560_remove),
++ .suspend = tsl2560_suspend,
++ .resume = tsl2560_resume,
++ .driver = {
++ .owner = THIS_MODULE,
++ .name = "tsl2560",
++ },
++};
++
++/* bus device */
++static struct samosa_device *tsl2560_device;
++
++/* class object */
++static struct class *tsl2560_class;
++
++static int __init tsl2560_init(void)
++{
++ int ret;
++
++ /* general initialisation */
++ spin_lock_init(&tsl2560_lock);
++
++ /* register a range of device nodes */
++ ret = alloc_chrdev_region(&dev, 0, 1, "tsl2560");
++ if (ret)
++ goto error;
++
++ /* create the tsl2560 character devices */
++ /* initialise character device */
++ cdev_init(&tsl2560.cdev, &tsl2560_fops);
++ /* claim ownership */
++ tsl2560.cdev.owner = THIS_MODULE;
++ /* add character device */
++ ret = cdev_add(&tsl2560.cdev, dev, 1);
++ if (ret) {
++ goto error_region;
++ }
++
++ /* create the class and devices */
++ tsl2560_class = class_create(THIS_MODULE, "tsl2560");
++
++ if (!device_create(tsl2560_class, NULL, (dev), NULL, "tsl2560"))
++ goto error_class_device;
++ /* register the device on a bus. */
++ tsl2560_device = samosa_device_register_simple("tsl2560", 0);
++ if (!tsl2560_device)
++ goto error_bus;
++
++ /* create proc access to displays */
++ proc_tsl2560 = create_proc_entry(PROC_TSL2560, S_IWUSR | S_IRUSR | S_IRGRP | S_IROTH, NULL);
++ if (proc_tsl2560)
++ proc_tsl2560->proc_fops = &proc_tsl2560_operations;
++
++ /* register the driver */
++ return samosa_driver_register(&tsl2560_driver);
++
++error_bus:
++ /* remove samosa device */
++ samosa_device_unregister(tsl2560_device);
++error_class_device:
++ device_destroy(tsl2560_class, dev);
++error_region:
++ unregister_chrdev_region(dev, 1);
++error:
++ return ret;
++}
++
++static void __exit tsl2560_exit(void)
++{
++ /* remove proc entry */
++ remove_proc_entry(PROC_TSL2560, NULL);
++
++ /* remove class device */
++ device_destroy(tsl2560_class, (dev));
++
++ /* remove samosa device */
++ samosa_device_unregister(tsl2560_device);
++
++ /* remove character device */
++ cdev_del(&tsl2560.cdev);
++ /* remove driver */
++ samosa_driver_unregister(&tsl2560_driver);
++
++ /* unregister region */
++ unregister_chrdev_region(dev, 1);
++
++ /* remove class */
++ class_destroy(tsl2560_class);
++}
++
++module_init(tsl2560_init);
++module_exit(tsl2560_exit);
++
++MODULE_AUTHOR("Chris Jones <chris@martin-jones.com>");
++MODULE_DESCRIPTION("TSL2560 light sensor via samosa bus on Balloon");
++MODULE_LICENSE("GPL");
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-vga.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-vga.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3-vga.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,196 @@
+Balloon3 VGA support
+
+Adds support for VGA and SVGA displays via the dev board.
+Includes generic support for PCDDIV LCCR4 bit (odd pixclock divisors)
+
+from: Nick Bane <nick@cecomputing.co.uk>
+
+Signed-off-by: Wookey <wookey@wookware.org>
+
+Index: linux-2.6.36-rc1/arch/arm/mach-pxa/Kconfig
+===================================================================
+--- linux-2.6.36-rc1.orig/arch/arm/mach-pxa/Kconfig 2010-08-16 01:41:37.000000000 +0100
++++ linux-2.6.36-rc1/arch/arm/mach-pxa/Kconfig 2010-08-22 16:59:07.000000000 +0100
+@@ -51,6 +51,7 @@
+
+ comment "Third Party Dev Platforms (sorted by vendor name)"
+
++
+ config ARCH_PXA_IDP
+ bool "Accelent Xscale IDP"
+ select PXA25x
+@@ -79,6 +80,32 @@
+ select IWMMXT
+ select PXA_HAVE_BOARD_IRQS
+
++ choice
++ prompt "Balloon 3 LCD configuration"
++
++ config BALLOON3_TOPPOLY
++ bool "Toppoly LCD panel on Balloon3"
++ depends on MACH_BALLOON3
++
++config BALLOON3_VGA
++ bool "VGA (640x480 62Hz) monitor output"
++ help
++ Say Y to add support for VGA output
++ on a Balloon3 board
++
++config BALLOON3_SVGA
++ bool "SVGA (800x600 52Hz) monitor output"
++ help
++ Say Y to add support for SVGA output
++ on a Balloon3 board
++
++config BALLOON3_NODISPLAY
++ bool "No LCD output"
++ help
++ Say Y for no LCD output on Balloon3
++
++endchoice
++
+ config MACH_CSB726
+ bool "Enable Cogent CSB726 System On a Module"
+ select PXA27x
+Index: linux-2.6.36-rc1/drivers/video/pxafb.c
+===================================================================
+--- linux-2.6.36-rc1.orig/drivers/video/pxafb.c 2010-08-16 01:41:37.000000000 +0100
++++ linux-2.6.36-rc1/drivers/video/pxafb.c 2010-08-22 16:59:07.000000000 +0100
+@@ -60,6 +60,7 @@
+ #include <asm/irq.h>
+ #include <asm/div64.h>
+ #include <mach/bitfield.h>
++#include <mach/regs-lcd.h>
+ #include <mach/pxafb.h>
+
+ /*
+@@ -984,9 +985,11 @@
+ * speeds */
+ pcd = (unsigned long long)(clk_get_rate(fbi->clk) / 10000);
+ pcd *= pixclock;
+- do_div(pcd, 100000000 * 2);
+- /* no need for this, since we should subtract 1 anyway. they cancel */
+- /* pcd += 1; */ /* make up for integer math truncations */
++ /* also take into account LCCR4 PCDDIV bit */
++ if (LCCR4 & LCCR4_PCDDIV)
++ do_div(pcd, 100000000);
++ else
++ do_div(pcd, 100000000 * 2);
+ return (unsigned int)pcd;
+ }
+
+@@ -1405,6 +1408,7 @@
+ pr_debug("reg_lccr1 0x%08x\n", (unsigned int) fbi->reg_lccr1);
+ pr_debug("reg_lccr2 0x%08x\n", (unsigned int) fbi->reg_lccr2);
+ pr_debug("reg_lccr3 0x%08x\n", (unsigned int) fbi->reg_lccr3);
++ pr_debug("reg_lccr4 0x%08x\n", (unsigned int) fbi->reg_lccr4);
+
+ /* enable LCD controller clock */
+ clk_enable(fbi->clk);
+@@ -1619,7 +1623,7 @@
+ case CPUFREQ_POSTCHANGE:
+ pcd = get_pcd(fbi, fbi->fb.var.pixclock);
+ set_hsync_time(fbi, pcd);
+- fbi->reg_lccr3 = (fbi->reg_lccr3 & ~0xff) |
++ fbi->reg_lccr3 = (fbi->reg_lccr3 & ~(LCCR3_PCD)) |
+ LCCR3_PixClkDiv(pcd);
+ set_ctrlr_state(fbi, C_ENABLE_CLKCHANGE);
+ break;
+@@ -1737,6 +1741,7 @@
+ fbi->lccr3 = LCCR3_Acb((inf->lcd_conn >> 10) & 0xff);
+ fbi->lccr3 |= (lcd_conn & LCD_BIAS_ACTIVE_LOW) ? LCCR3_OEP : 0;
+ fbi->lccr3 |= (lcd_conn & LCD_PCLK_EDGE_FALL) ? LCCR3_PCP : 0;
++ fbi->lccr4 |= (lcd_conn & LCD_PCLK_DIV_ODD) ? LCCR4_PCDDIV : 0;
+
+ decode_mode:
+ pxafb_setmode(&fbi->fb.var, &inf->modes[0]);
+@@ -2051,6 +2056,8 @@
+ (inf->modes->upper_margin || inf->modes->lower_margin))
+ dev_warn(dev, "Upper and lower margins must be 0 in "
+ "passive mode\n");
++ if ((inf->lccr4 & LCCR4_PCDDIV) && ((inf->lccr3 & LCCR3_PCD) < 1))
++ dev_warn(dev, "Invalid pixel clock register settings\n");
+ }
+ #else
+ #define pxafb_check_options(...) do {} while (0)
+Index: linux-2.6.36-rc1/arch/arm/mach-pxa/include/mach/pxafb.h
+===================================================================
+--- linux-2.6.36-rc1.orig/arch/arm/mach-pxa/include/mach/pxafb.h 2010-08-16 01:41:37.000000000 +0100
++++ linux-2.6.36-rc1/arch/arm/mach-pxa/include/mach/pxafb.h 2010-08-22 16:59:07.000000000 +0100
+@@ -61,6 +61,7 @@
+ #define LCD_PCLK_EDGE_RISE (0 << 19)
+ #define LCD_PCLK_EDGE_FALL (1 << 19)
+ #define LCD_ALTERNATE_MAPPING (1 << 20)
++#define LCD_PCLK_DIV_ODD (1 << 21)
+
+ /*
+ * This structure describes the machine which we are running on.
+@@ -146,8 +147,8 @@
+ u_int lccr3;
+ /* The following should be defined in LCCR4
+ * LCCR4_PAL_FOR_0 or LCCR4_PAL_FOR_1 or LCCR4_PAL_FOR_2
++ * LCCR4_PCDDIV (if odd pixclock divisor required)
+ *
+- * All other bits in LCCR4 should be left alone.
+ */
+ u_int lccr4;
+ void (*pxafb_backlight_power)(int);
+Index: linux-2.6.36-rc1/drivers/video/fbmem.c
+===================================================================
+--- linux-2.6.36-rc1.orig/drivers/video/fbmem.c 2010-08-16 01:41:37.000000000 +0100
++++ linux-2.6.36-rc1/drivers/video/fbmem.c 2010-08-22 16:59:07.000000000 +0100
+@@ -1050,6 +1050,8 @@
+ ret = copy_to_user(argp, &var, sizeof(var)) ? -EFAULT : 0;
+ break;
+ case FBIOPUT_VSCREENINFO:
++ /*!! W - pretend it worked*/
++ return 0;
+ if (copy_from_user(&var, argp, sizeof(var)))
+ return -EFAULT;
+ if (!lock_fb_info(info))
+Index: linux-2.6.36-rc1/arch/arm/mach-pxa/include/mach/regs-lcd.h
+===================================================================
+--- linux-2.6.36-rc1.orig/arch/arm/mach-pxa/include/mach/regs-lcd.h 2010-08-16 01:41:37.000000000 +0100
++++ linux-2.6.36-rc1/arch/arm/mach-pxa/include/mach/regs-lcd.h 2010-08-22 16:59:07.000000000 +0100
+@@ -46,6 +46,41 @@
+ #define LCCR4_PAL_FOR_2 (2 << 15)
+ #define LCCR4_PAL_FOR_3 (3 << 15)
+ #define LCCR4_PAL_FOR_MASK (3 << 15)
++#define LCCR4_PCDDIV (1<<31) /* PCD Divisor Selection */
++#define LCCR4_K3 Fld(3, 6) /* Multiplication constant for Green for Half Transparency */
++#define LCCR4_K3green(K) (((K) << FShft(LCCR4_K3)))
++#define LCCR4_K2 Fld(3, 3) /* Multiplication constant for Blue for Half Transparency */
++#define LCCR4_K2blue(K) (((K) << FShft(LCCR4_K2)))
++#define LCCR4_K1 Fld(3, 0) /* Multiplication constant for Red for Half Transparency */
++#define LCCR4_K1red(K) (((K) << FShft(LCCR4_K1)))
++
++#define LCCR5_IUM6 (1<<29) /* Input FIFO Underrun Mask for Command Data */
++#define LCCR5_IUM5 (1<<28) /* Input FIFO Underrun Mask for Cursor */
++#define LCCR5_IUM4 (1<<27) /* Input FIFO Underrun Mask for Overlay 2 */
++#define LCCR5_IUM3 (1<<26) /* Input FIFO Underrun Mask for Overlay 2 */
++#define LCCR5_IUM2 (1<<25) /* Input FIFO Underrun Mask for Overlay 2 */
++#define LCCR5_IUM1 (1<<24) /* Input FIFO Underrun Mask for Overlay 1 */
++
++#define LCCR5_BSM6 (1<<21) /* Branch Mask for DMA Channel 6 */
++#define LCCR5_BSM5 (1<<20) /* Branch Mask for DMA Channel 5 */
++#define LCCR5_BSM4 (1<<19) /* Branch Mask for DMA Channel 4 */
++#define LCCR5_BSM3 (1<<18) /* Branch Mask for DMA Channel 3 */
++#define LCCR5_BSM2 (1<<17) /* Branch Mask for DMA Channel 2 */
++#define LCCR5_BSM1 (1<<16) /* Branch Mask for DMA Channel 1 */
++
++#define LCCR5_EOFM6 (1<<13) /* End of Frame Mask for DMA Channel 6 */
++#define LCCR5_EOFM5 (1<<12) /* End of Frame Mask for DMA Channel 5 */
++#define LCCR5_EOFM4 (1<<11) /* End of Frame Mask for DMA Channel 4 */
++#define LCCR5_EOFM3 (1<<10) /* End of Frame Mask for DMA Channel 3 */
++#define LCCR5_EOFM2 (1<<9) /* End of Frame Mask for DMA Channel 2 */
++#define LCCR5_EOFM1 (1<<8) /* End of Frame Mask for DMA Channel 1 */
++
++#define LCCR5_SOFM5 (1<<5) /* Start of Frame Mask for DMA Channel 6 */
++#define LCCR5_SOFM4 (1<<4) /* Start of Frame Mask for DMA Channel 6 */
++#define LCCR5_SOFM3 (1<<3) /* Start of Frame Mask for DMA Channel 6 */
++#define LCCR5_SOFM2 (1<<2) /* Start of Frame Mask for DMA Channel 6 */
++#define LCCR5_SOFM1 (1<<1) /* Start of Frame Mask for DMA Channel 6 */
++#define LCCR5_SOFM0 (1<<0) /* Start of Frame Mask for DMA Channel 6 */
+
+ #define FDADR0 (0x200) /* DMA Channel 0 Frame Descriptor Address Register */
+ #define FDADR1 (0x210) /* DMA Channel 1 Frame Descriptor Address Register */
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3.patch
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3.patch (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3.patch 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,244 @@
+Index: linux-2.6.36-rc1/arch/arm/Kconfig
+===================================================================
+--- linux-2.6.36-rc1.orig/arch/arm/Kconfig 2010-08-22 18:06:12.000000000 +0100
++++ linux-2.6.36-rc1/arch/arm/Kconfig 2010-08-22 18:06:20.000000000 +0100
+@@ -1363,7 +1363,8 @@
+ ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
+ ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
+ ARCH_AT91 || ARCH_DAVINCI || \
+- ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
++ ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW || \
++ MACH_BALLOON3
+ help
+ If you say Y here, the LEDs on your machine will be used
+ to provide useful information about your current system status.
+Index: linux-2.6.36-rc1/arch/arm/mach-pxa/balloon3.c
+===================================================================
+--- linux-2.6.36-rc1.orig/arch/arm/mach-pxa/balloon3.c 2010-08-22 18:06:13.000000000 +0100
++++ linux-2.6.36-rc1/arch/arm/mach-pxa/balloon3.c 2010-08-22 18:53:54.000000000 +0100
+@@ -26,6 +26,7 @@
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
+ #include <linux/types.h>
++#include <linux/delay.h>
+ #include <linux/i2c/pcf857x.h>
+ #include <linux/mtd/nand.h>
+ #include <linux/mtd/physmap.h>
+@@ -48,7 +49,6 @@
+ #include <mach/mmc.h>
+ #include <mach/udc.h>
+ #include <mach/pxa27x-udc.h>
+-#include <mach/irda.h>
+ #include <mach/ohci.h>
+
+ #include <plat/i2c.h>
+@@ -313,7 +313,7 @@
+ static void __init balloon3_udc_init(void)
+ {
+ pxa_set_udc_info(&balloon3_udc_info);
+- platform_device_register(&balloon3_gpio_vbus);
++// platform_device_register(&balloon3_gpio_vbus);
+ }
+ #else
+ static inline void balloon3_udc_init(void) {}
+@@ -450,14 +450,14 @@
+ {
+ int balloon3_irq = (irq - BALLOON3_IRQ(0));
+ balloon3_irq_enabled &= ~(1 << balloon3_irq);
+- __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
++ __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_SET_REG);
+ }
+
+ static void balloon3_unmask_irq(unsigned int irq)
+ {
+ int balloon3_irq = (irq - BALLOON3_IRQ(0));
+ balloon3_irq_enabled |= (1 << balloon3_irq);
+- __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_REG);
++ __raw_writel(~balloon3_irq_enabled, BALLOON3_INT_CONTROL_CLR_REG);
+ }
+
+ static struct irq_chip balloon3_irq_chip = {
+@@ -733,6 +733,82 @@
+ static inline void balloon3_pmic_init(void) {}
+ #endif
+
++static void balloon3_poweroff(void) {
++ int n;
++// unsigned int ac97powercontrol=0;
++
++ pr_info("balloon3_poweroff\n");
++ /* enable 32.768kHz osc so the CPU can switch off 13MHz one */
++ OSCC |= OSCC_OON;
++ pr_info("Waiting for 32kHz osc to stabilise...\n");
++ for(n=0;n<50;n++) {
++ if(OSCC&OSCC_OOK)
++ break;
++ mdelay(100);
++ }
++ if(n==50)
++ pr_info("Failed. Is crystal OK?\n");
++ else
++ pr_info("OK\n");
++
++ /* nasty hack for L3 because codec power is not switchable */
++ /* bludgeon AC97 interface into putting codec in standby */
++ /* doesn't work */
++// pr_info("Shutting down codec\n");
++// GSR = GSR_CDONE | GSR_SDONE;
++// ac97powercontrol|=AC97_PD_PR0 | AC97_PD_PR1;
++// PAC_REG_POWERCONTROL = ac97powercontrol;
++// //while (!(GSR & GSR_CDONE));
++// udelay(100);
++// GSR = GSR_CDONE | GSR_SDONE;
++// ac97powercontrol|=AC97_PD_PR3;
++// PAC_REG_POWERCONTROL = ac97powercontrol;
++// //while (!(GSR & GSR_CDONE));
++// udelay(100);
++// GSR = GSR_CDONE | GSR_SDONE;
++// ac97powercontrol|=AC97_PD_PR4 | AC97_PD_PR5;
++// PAC_REG_POWERCONTROL = ac97powercontrol;
++// //while (!(GSR & GSR_CDONE));
++
++ /* switch off backlight, not that anyone uses it */
++ gpio_set_value(BALLOON3_GPIO_RUN_BACKLIGHT, 0);
++ /* switch off NAND and Samosa */
++ gpio_set_value(BALLOON3_GPIO_RUN_NAND, 0);
++ gpio_set_value(BALLOON3_GPIO_RUN_SAMOSA, 0);
++ /* switch off FPGA */
++ gpio_set_value(BALLOON3_GPIO_RUN_SPARTAN, 0);
++
++ /* switch off CPU by entering deep-sleep mode */
++ /* this is cut-and-pasted from pxa27x_cpu_pm_enter() */
++ /* ensure voltage-change sequencer not initiated, which hangs */
++ /* enable linear regulator rather than dc-dc converter */
++ /* and say it's ok to stop 13MHz osc */
++ PCFR &= ~(PCFR_FVC+PCFR_DC_EN+PCFR_RO);
++ PCFR |= PCFR_L1_EN + PCFR_OPDE;
++ /* Clear edge-detect status register. */
++ PEDR = 0xDF12FE1B;
++ /* make sure nothing will wake us up */
++ /* although deep sleep seems to insist on listening to GPIO0 and 1 even if we tell it not to */
++ PRER = 0x0;
++ PFER = 0x0;
++ PWER = 0x0;
++ /* configure sleep to ignore nVDD_FAULT and not assert reset */
++ PSLR |= (1<<2) + PSLR_SL_ROD + (0xf << 8);
++ PSLR &= ~ 0x0c;
++ /* Clear reset status */
++ RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
++ pr_info("Going into deep sleep\n");
++
++ /* switch off RS232 */
++ gpio_set_value(BALLOON3_GPIO_RUN_232, 0);
++ asm ( "mov r0,#0x7\n"
++ "mcr p14, 0, r0, c7, c0, 0\n"
++ );
++ while(1);
++ /* nothing can save us now */
++}
++
++
+ /******************************************************************************
+ * Machine init
+ ******************************************************************************/
+@@ -742,6 +818,8 @@
+
+ pxa2xx_mfp_config(ARRAY_AND_SIZE(balloon3_pin_config));
+
++ pm_power_off = balloon3_poweroff;
++
+ pxa_set_ffuart_info(NULL);
+ pxa_set_btuart_info(NULL);
+ pxa_set_stuart_info(NULL);
+@@ -774,6 +852,62 @@
+ iotable_init(balloon3_io_desc, ARRAY_SIZE(balloon3_io_desc));
+ }
+
++/* power management which is board-specific but doesn't fit anywhere else */
++#ifdef CONFIG_PM
++
++/* sys_device for Balloon 3 PM */
++
++static int balloon3_pm_suspend(struct sys_device *dev, pm_message_t msg)
++{
++ pr_debug("%s: suspend\n", __func__);
++ /* switch off serial port transceiver */
++ gpio_set_value(BALLOON3_GPIO_RUN_232,0);
++ /* switch off NAND and SAMOSA */
++ __raw_writel(BALLOON3_NAND_PARKING + BALLOON3_CF_SAMOSA_PARKING, BALLOON3_GENERAL_CONTROL_SET_REG);
++ gpio_set_value(BALLOON3_GPIO_RUN_NAND,0);
++ gpio_set_value(BALLOON3_GPIO_RUN_SAMOSA,0);
++
++ return 0;
++}
++
++static int balloon3_pm_resume(struct sys_device *dev)
++{
++ /* switch on serial port transceiver */
++ gpio_set_value(BALLOON3_GPIO_RUN_232,1);
++ /* switch on NAND and SAMOSA */
++ __raw_writel(BALLOON3_NAND_PARKING + BALLOON3_CF_SAMOSA_PARKING, BALLOON3_GENERAL_CONTROL_CLR_REG);
++ gpio_set_value(BALLOON3_GPIO_RUN_NAND,1);
++ gpio_set_value(BALLOON3_GPIO_RUN_SAMOSA,1);
++ pr_debug("%s: resume\n", __func__);
++
++ return 0;
++}
++
++static struct sysdev_class balloon3_pm_sysclass = {
++ .name = "balloon3_pm",
++ .suspend = balloon3_pm_suspend,
++ .resume = balloon3_pm_resume,
++};
++
++static struct sys_device balloon3_pm_device = {
++ .cls = &balloon3_pm_sysclass,
++};
++
++static int __init balloon3_pm_init(void)
++{
++ int ret = -ENODEV;
++ if (machine_is_balloon3()) {
++ ret = sysdev_class_register(&balloon3_pm_sysclass);
++ if (ret == 0)
++ ret = sysdev_register(&balloon3_pm_device);
++ }
++ return ret;
++}
++
++device_initcall(balloon3_pm_init);
++#endif
++
++
+ MACHINE_START(BALLOON3, "Balloon3")
+ /* Maintainer: Nick Bane. */
+ .phys_io = 0x40000000,
+Index: linux-2.6.36-rc1/arch/arm/mach-pxa/include/mach/memory.h
+===================================================================
+--- linux-2.6.36-rc1.orig/arch/arm/mach-pxa/include/mach/memory.h 2010-08-22 18:06:13.000000000 +0100
++++ linux-2.6.36-rc1/arch/arm/mach-pxa/include/mach/memory.h 2010-08-22 18:06:20.000000000 +0100
+@@ -26,5 +26,24 @@
+ #define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_64M - 1)
+ #define MAX_DMA_ADDRESS (PAGE_OFFSET + SZ_64M)
+ #endif
++/*
++ * The Balloon3 board has 384 MB of RAM. This * hack should be removed
++ * once the PHYS_OFFSET can be configured dynamically.
++ *
++ * The three 128MB SDRAM banks are at addresses 0xa0000000, 0xb0000000 and
++ * 0x80000000. The following code moves the block of SDRAM at 0x80000000 past
++ * the block at 0xb0000000 in virtual memory and vice versa. We use SparseMEM to
++ * map the pages properly.
++ */
++#ifdef CONFIG_MACH_BALLOON3
++#define MAX_PHYSMEM_BITS 32
++#define SECTION_SIZE_BITS 29
++#define __phys_to_virt(p) \
++ (((p) & 0x0fffffff) | \
++ (((p) & 0x10000000) ? 0x10000000 : (((p) & 0x20000000) ? 0x00000000 : 0x20000000)) | PAGE_OFFSET)
++#define __virt_to_phys(v) \
++ (((v) & 0x0fffffff) | \
++ (((v) & 0x10000000) ? 0xb0000000 : (((v) & 0x20000000) ? 0x80000000 : 0xa0000000)))
++#endif
+
+ #endif
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3config
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3config (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3config 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,2033 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29-rc7
+# Thu Mar 5 14:02:02 2009
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION="-pxa270"
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_INITRAMFS_ROOT_UID=0
+CONFIG_INITRAMFS_ROOT_GID=0
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+# CONFIG_INITRAMFS_COMPRESSION_NONE is not set
+# CONFIG_INITRAMFS_COMPRESSION_GZIP is not set
+CONFIG_INITRAMFS_COMPRESSION_BZIP2=y
+# CONFIG_INITRAMFS_COMPRESSION_LZMA is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+
+#
+# Block layer
+#
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_W90X900 is not set
+
+#
+# Intel PXA2xx/PXA3xx Implementations
+#
+# CONFIG_ARCH_GUMSTIX is not set
+# CONFIG_MACH_INTELMOTE2 is not set
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_MACH_MP900C is not set
+CONFIG_MACH_BALLOON3=y
+CONFIG_BALLOON3_TOPPOLY=y
+# CONFIG_BALLOON3_VGA is not set
+# CONFIG_BALLOON3_SVGA is not set
+# CONFIG_BALLOON3_NODISPLAY is not set
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_VIPER is not set
+# CONFIG_ARCH_PXA_ESERIES is not set
+# CONFIG_TRIZEPS_PXA is not set
+# CONFIG_MACH_H5000 is not set
+# CONFIG_MACH_EM_X270 is not set
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_ZYLONITE is not set
+# CONFIG_MACH_LITTLETON is not set
+# CONFIG_MACH_TAVOREVB is not set
+# CONFIG_MACH_SAAR is not set
+# CONFIG_MACH_ARMCORE is not set
+# CONFIG_MACH_CM_X300 is not set
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_MIOA701 is not set
+# CONFIG_MACH_PCM027 is not set
+# CONFIG_ARCH_PXA_PALM is not set
+# CONFIG_PXA_EZX is not set
+CONFIG_PXA27x=y
+# CONFIG_PXA_PWM is not set
+CONFIG_PXA_HAVE_BOARD_IRQS=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+# CONFIG_ARM_THUMB is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_OUTER_CACHE is not set
+CONFIG_IWMMXT=y
+CONFIG_XSCALE_PMU=y
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCCARD=m
+CONFIG_PCMCIA_DEBUG=y
+CONFIG_PCMCIA=m
+CONFIG_PCMCIA_LOAD_CIS=y
+# CONFIG_PCMCIA_IOCTL is not set
+
+#
+# PC-card bridges
+#
+CONFIG_PCMCIA_PXA2XX=m
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+# CONFIG_OABI_COMPAT is not set
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=m
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_APM_EMULATION is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+CONFIG_NETDEVICES=y
+CONFIG_TUN=m
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=m
+CONFIG_NET_PCI=y
+CONFIG_CS89x0=m
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_MULTIPLE_TABLES=y
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+# CONFIG_IP_PNP is not set
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE=m
+# CONFIG_NET_IPGRE_BROADCAST is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+# CONFIG_BRIDGE_NETFILTER is not set
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
+# CONFIG_NETFILTER_NETLINK_LOG is not set
+# CONFIG_NF_CONNTRACK is not set
+# CONFIG_NETFILTER_XTABLES is not set
+# CONFIG_IP_VS is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_NF_DEFRAG_IPV4 is not set
+CONFIG_IP_NF_QUEUE=m
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+
+#
+# IPv6: Netfilter Configuration
+#
+CONFIG_IP6_NF_QUEUE=m
+# CONFIG_IP6_NF_IPTABLES is not set
+# CONFIG_IP_DCCP is not set
+CONFIG_IP_SCTP=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+CONFIG_SCTP_HMAC_MD5=y
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+CONFIG_STP=m
+CONFIG_BRIDGE=m
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+CONFIG_NET_SCHED=y
+
+#
+# Queueing/Scheduling
+#
+# CONFIG_NET_SCH_CBQ is not set
+# CONFIG_NET_SCH_HTB is not set
+# CONFIG_NET_SCH_HFSC is not set
+# CONFIG_NET_SCH_PRIO is not set
+# CONFIG_NET_SCH_MULTIQ is not set
+# CONFIG_NET_SCH_RED is not set
+# CONFIG_NET_SCH_SFQ is not set
+# CONFIG_NET_SCH_TEQL is not set
+# CONFIG_NET_SCH_TBF is not set
+# CONFIG_NET_SCH_GRED is not set
+# CONFIG_NET_SCH_DSMARK is not set
+# CONFIG_NET_SCH_NETEM is not set
+# CONFIG_NET_SCH_DRR is not set
+
+#
+# Classification
+#
+# CONFIG_NET_CLS_BASIC is not set
+# CONFIG_NET_CLS_TCINDEX is not set
+# CONFIG_NET_CLS_ROUTE4 is not set
+# CONFIG_NET_CLS_FW is not set
+# CONFIG_NET_CLS_U32 is not set
+# CONFIG_NET_CLS_RSVP is not set
+# CONFIG_NET_CLS_RSVP6 is not set
+# CONFIG_NET_CLS_FLOW is not set
+# CONFIG_NET_EMATCH is not set
+# CONFIG_NET_CLS_ACT is not set
+CONFIG_NET_SCH_FIFO=y
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=m
+CONFIG_BT_L2CAP=m
+CONFIG_BT_SCO=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIBTSDIO=m
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIBCM203X=m
+CONFIG_BT_HCIBPA10X=m
+CONFIG_BT_HCIBFUSB=m
+CONFIG_BT_HCIDTL1=m
+CONFIG_BT_HCIBT3C=m
+CONFIG_BT_HCIBLUECARD=m
+CONFIG_BT_HCIBTUART=m
+CONFIG_BT_HCIVHCI=m
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+CONFIG_FIB_RULES=y
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_LIB80211=m
+CONFIG_LIB80211_CRYPT_WEP=m
+CONFIG_LIB80211_CRYPT_CCMP=m
+CONFIG_LIB80211_CRYPT_TKIP=m
+# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=m
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+CONFIG_MTD_REDBOOT_PARTS=m
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_AFS_PARTS=m
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_CHAR is not set
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_XIP is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_SHARP_SL is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_VERIFY_WRITE=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_H1900 is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_SHARPSL is not set
+CONFIG_MTD_NAND_BALLOON3=y
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_GLUEBI is not set
+
+#
+# UBI debugging options
+#
+# CONFIG_MTD_UBI_DEBUG is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+CONFIG_IDE=m
+
+#
+# Please see Documentation/ide/ide.txt for help/info on IDE drives
+#
+CONFIG_IDE_ATAPI=y
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_IDE_GD=m
+CONFIG_IDE_GD_ATA=y
+# CONFIG_IDE_GD_ATAPI is not set
+CONFIG_BLK_DEV_IDECS=m
+CONFIG_BLK_DEV_IDECD=m
+CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
+CONFIG_BLK_DEV_IDETAPE=m
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_PROC_FS=y
+
+#
+# IDE chipset support/bugfixes
+#
+# CONFIG_BLK_DEV_PLATFORM is not set
+# CONFIG_BLK_DEV_IDEDMA is not set
+
+#
+# SCSI device support
+#
+CONFIG_RAID_ATTRS=m
+CONFIG_SCSI=m
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=m
+CONFIG_CHR_DEV_ST=m
+CONFIG_CHR_DEV_OSST=m
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=m
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+CONFIG_SCSI_SPI_ATTRS=m
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
+# CONFIG_SCSI_DH is not set
+CONFIG_ATA=m
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_MV is not set
+CONFIG_PATA_PCMCIA=m
+
+#
+# Multi-device support (RAID and LVM)
+#
+CONFIG_MD=y
+# CONFIG_BLK_DEV_MD is not set
+CONFIG_BLK_DEV_DM=m
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_CRYPT is not set
+# CONFIG_DM_SNAPSHOT is not set
+# CONFIG_DM_MIRROR is not set
+# CONFIG_DM_ZERO is not set
+# CONFIG_DM_MULTIPATH is not set
+# CONFIG_DM_DELAY is not set
+# CONFIG_DM_UEVENT is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=m
+CONFIG_BONDING=m
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=m
+
+#
+# MII PHY device drivers
+#
+CONFIG_MARVELL_PHY=m
+CONFIG_DAVICOM_PHY=m
+CONFIG_QSEMI_PHY=m
+CONFIG_LXT_PHY=m
+CONFIG_CICADA_PHY=m
+CONFIG_VITESSE_PHY=m
+CONFIG_SMSC_PHY=m
+CONFIG_BROADCOM_PHY=m
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=m
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+CONFIG_CS89x0=m
+CONFIG_NETDEV_1000=y
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+CONFIG_WLAN_80211=y
+CONFIG_PCMCIA_RAYCS=m
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_USB=m
+CONFIG_LIBERTAS_CS=m
+# CONFIG_LIBERTAS_SDIO is not set
+# CONFIG_LIBERTAS_DEBUG is not set
+CONFIG_HERMES=m
+CONFIG_HERMES_CACHE_FW_ON_INIT=y
+# CONFIG_PCMCIA_HERMES is not set
+# CONFIG_PCMCIA_SPECTRUM is not set
+CONFIG_ATMEL=m
+# CONFIG_PCMCIA_ATMEL is not set
+CONFIG_AIRO_CS=m
+CONFIG_PCMCIA_WL3501=m
+CONFIG_USB_ZD1201=m
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_IWLWIFI_LEDS is not set
+CONFIG_HOSTAP=m
+CONFIG_HOSTAP_FIRMWARE=y
+CONFIG_HOSTAP_FIRMWARE_NVRAM=y
+CONFIG_HOSTAP_CS=m
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+CONFIG_USB_CATC=m
+CONFIG_USB_KAWETH=m
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_RTL8150=m
+CONFIG_USB_USBNET=m
+CONFIG_USB_NET_AX8817X=m
+CONFIG_USB_NET_CDCETHER=m
+CONFIG_USB_NET_DM9601=m
+# CONFIG_USB_NET_SMSC95XX is not set
+CONFIG_USB_NET_GL620A=m
+CONFIG_USB_NET_NET1080=m
+CONFIG_USB_NET_PLUSB=m
+CONFIG_USB_NET_MCS7830=m
+CONFIG_USB_NET_RNDIS_HOST=m
+CONFIG_USB_NET_CDC_SUBSET=m
+CONFIG_USB_ALI_M5632=y
+CONFIG_USB_AN2720=y
+CONFIG_USB_BELKIN=y
+CONFIG_USB_ARMLINUX=y
+# CONFIG_USB_EPSON2888 is not set
+CONFIG_USB_KC2190=y
+CONFIG_USB_NET_ZAURUS=m
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+CONFIG_PCMCIA_3C574=m
+CONFIG_PCMCIA_FMVJ18X=m
+CONFIG_PCMCIA_PCNET=m
+CONFIG_PCMCIA_NMCLAN=m
+CONFIG_PCMCIA_SMC91C92=m
+CONFIG_PCMCIA_XIRC2PS=m
+CONFIG_PCMCIA_AXNET=m
+# CONFIG_WAN is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_MPPE=m
+CONFIG_PPPOE=m
+# CONFIG_PPPOL2TP is not set
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLHC=m
+CONFIG_SLIP_SMART=y
+# CONFIG_SLIP_MODE_SLIP6 is not set
+CONFIG_NETCONSOLE=m
+# CONFIG_NETCONSOLE_DYNAMIC is not set
+CONFIG_NETPOLL=y
+# CONFIG_NETPOLL_TRAP is not set
+CONFIG_NET_POLL_CONTROLLER=y
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=m
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=m
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_PXA27x is not set
+CONFIG_KEYBOARD_GPIO=m
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+CONFIG_MOUSE_SERIAL=m
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+CONFIG_INPUT_JOYSTICK=y
+# CONFIG_JOYSTICK_ANALOG is not set
+# CONFIG_JOYSTICK_A3D is not set
+# CONFIG_JOYSTICK_ADI is not set
+# CONFIG_JOYSTICK_COBRA is not set
+# CONFIG_JOYSTICK_GF2K is not set
+# CONFIG_JOYSTICK_GRIP is not set
+# CONFIG_JOYSTICK_GRIP_MP is not set
+# CONFIG_JOYSTICK_GUILLEMOT is not set
+# CONFIG_JOYSTICK_INTERACT is not set
+# CONFIG_JOYSTICK_SIDEWINDER is not set
+# CONFIG_JOYSTICK_TMDC is not set
+# CONFIG_JOYSTICK_IFORCE is not set
+# CONFIG_JOYSTICK_WARRIOR is not set
+# CONFIG_JOYSTICK_MAGELLAN is not set
+# CONFIG_JOYSTICK_SPACEORB is not set
+# CONFIG_JOYSTICK_SPACEBALL is not set
+# CONFIG_JOYSTICK_STINGER is not set
+# CONFIG_JOYSTICK_TWIDJOY is not set
+# CONFIG_JOYSTICK_ZHENHUA is not set
+# CONFIG_JOYSTICK_JOYDUMP is not set
+# CONFIG_JOYSTICK_XPAD is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+CONFIG_TOUCHSCREEN_UCB1400=m
+# CONFIG_TOUCHSCREEN_WM97XX is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+CONFIG_INPUT_UINPUT=y
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=m
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_MINIPUG=m
+CONFIG_MEGAPUG=m
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
+# CONFIG_IPWIRELESS is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_SAMOSA=y
+# CONFIG_PROC_SAMOSA is not set
+CONFIG_I2C=m
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=m
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=m
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+CONFIG_I2C_GPIO=m
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_PXA=m
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+CONFIG_SENSORS_PCF8574=m
+# CONFIG_PCF8575 is not set
+CONFIG_SENSORS_PCA9539=m
+CONFIG_SENSORS_PCF8591=m
+CONFIG_SENSORS_MAX6875=m
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+CONFIG_W1=m
+CONFIG_W1_CON=y
+
+#
+# 1-wire Bus Masters
+#
+CONFIG_W1_MASTER_DS2490=m
+CONFIG_W1_MASTER_DS2482=m
+# CONFIG_W1_MASTER_DS1WM is not set
+# CONFIG_W1_MASTER_GPIO is not set
+
+#
+# 1-wire Slaves
+#
+CONFIG_W1_SLAVE_THERM=m
+CONFIG_W1_SLAVE_SMEM=m
+# CONFIG_W1_SLAVE_DS2431 is not set
+CONFIG_W1_SLAVE_DS2433=m
+# CONFIG_W1_SLAVE_DS2433_CRC is not set
+# CONFIG_W1_SLAVE_DS2760 is not set
+# CONFIG_W1_SLAVE_BQ27000 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_SA1100_WATCHDOG=m
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+CONFIG_UCB1400_CORE=m
+# CONFIG_TPS65010 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+
+#
+# Multimedia devices
+#
+
+#
+# Multimedia core support
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_VIDEO_MEDIA is not set
+
+#
+# Multimedia drivers
+#
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_UVESA is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_PXA=y
+# CONFIG_FB_PXA_OVERLAY is not set
+# CONFIG_FB_PXA_SMARTPANEL is not set
+CONFIG_FB_PXA_PARAMETERS=y
+# CONFIG_FB_MBX is not set
+# CONFIG_FB_W100 is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_ILI9320 is not set
+CONFIG_LCD_PLATFORM=m
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+
+#
+# Sound
+#
+CONFIG_SOUND=m
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+CONFIG_SND_HWDEP=m
+CONFIG_SND_RAWMIDI=m
+CONFIG_SND_SEQUENCER=m
+# CONFIG_SND_SEQ_DUMMY is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+CONFIG_SND_SEQUENCER_OSS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_VMASTER=y
+CONFIG_SND_AC97_CODEC=m
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_VIRMIDI is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+CONFIG_SND_AC97_POWER_SAVE=y
+CONFIG_SND_AC97_POWER_SAVE_DEFAULT=2
+CONFIG_SND_ARM=y
+CONFIG_SND_PXA2XX_PCM=m
+CONFIG_SND_PXA2XX_LIB=m
+CONFIG_SND_PXA2XX_LIB_AC97=y
+CONFIG_SND_PXA2XX_AC97=m
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
+# CONFIG_SND_PCMCIA is not set
+# CONFIG_SND_VXPOCKET is not set
+# CONFIG_SND_PDAUDIOCF is not set
+CONFIG_SND_SOC=m
+CONFIG_SND_PXA2XX_SOC=m
+CONFIG_SND_SOC_I2C_AND_SPI=m
+# CONFIG_SND_SOC_ALL_CODECS is not set
+# CONFIG_SOUND_PRIME is not set
+CONFIG_AC97_BUS=m
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=m
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=m
+CONFIG_HID_PID=y
+CONFIG_USB_HIDDEV=y
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
+CONFIG_HID_A4TECH=m
+CONFIG_HID_APPLE=m
+CONFIG_HID_BELKIN=m
+CONFIG_HID_CHERRY=m
+CONFIG_HID_CHICONY=m
+CONFIG_HID_CYPRESS=m
+CONFIG_HID_EZKEY=m
+CONFIG_HID_GYRATION=m
+CONFIG_HID_LOGITECH=m
+CONFIG_LOGITECH_FF=y
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=m
+CONFIG_HID_MONTEREY=m
+CONFIG_HID_NTRIG=m
+CONFIG_HID_PANTHERLORD=m
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=m
+CONFIG_HID_SAMSUNG=m
+CONFIG_HID_SONY=m
+CONFIG_HID_SUNPLUS=m
+# CONFIG_GREENASIA_FF is not set
+CONFIG_HID_TOPSEED=m
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=m
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_SUSPEND=y
+# CONFIG_USB_OTG is not set
+CONFIG_USB_MON=m
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=m
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_U132_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+CONFIG_USB_ACM=m
+CONFIG_USB_PRINTER=m
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+#
+
+#
+# see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+CONFIG_USB_LIBUSUAL=y
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+CONFIG_USB_SERIAL=m
+CONFIG_USB_EZUSB=y
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_AIRCABLE=m
+CONFIG_USB_SERIAL_ARK3116=m
+CONFIG_USB_SERIAL_BELKIN=m
+# CONFIG_USB_SERIAL_CH341 is not set
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+CONFIG_USB_SERIAL_CP2101=m
+CONFIG_USB_SERIAL_CYPRESS_M8=m
+# CONFIG_USB_SERIAL_EMPEG is not set
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_FUNSOFT=m
+# CONFIG_USB_SERIAL_VISOR is not set
+CONFIG_USB_SERIAL_IPAQ=m
+CONFIG_USB_SERIAL_IR=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT_TI=m
+CONFIG_USB_SERIAL_GARMIN=m
+CONFIG_USB_SERIAL_IPW=m
+# CONFIG_USB_SERIAL_IUU is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+CONFIG_USB_SERIAL_KLSI=m
+CONFIG_USB_SERIAL_KOBIL_SCT=m
+CONFIG_USB_SERIAL_MCT_U232=m
+CONFIG_USB_SERIAL_MOS7720=m
+CONFIG_USB_SERIAL_MOS7840=m
+# CONFIG_USB_SERIAL_MOTOROLA is not set
+CONFIG_USB_SERIAL_NAVMAN=m
+CONFIG_USB_SERIAL_PL2303=m
+# CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_SPCP8X5 is not set
+CONFIG_USB_SERIAL_HP4X=m
+CONFIG_USB_SERIAL_SAFE=m
+CONFIG_USB_SERIAL_SAFE_PADDED=y
+# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
+CONFIG_USB_SERIAL_SIERRAWIRELESS=m
+CONFIG_USB_SERIAL_TI=m
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_XIRCOM=m
+CONFIG_USB_SERIAL_OPTION=m
+CONFIG_USB_SERIAL_OMNINET=m
+# CONFIG_USB_SERIAL_OPTICON is not set
+CONFIG_USB_SERIAL_DEBUG=m
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_ETH_RNDIS_COMPAT=y
+# CONFIG_USB_GADGETFS is not set
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+CONFIG_USB_CDC_COMPOSITE=m
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+CONFIG_USB_GPIO_VBUS=m
+CONFIG_MMC=m
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=m
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_PXA=m
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+CONFIG_LEDS_GPIO=y
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_IDE_DISK=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_SA1100 is not set
+CONFIG_RTC_DRV_PXA=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=m
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=m
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=m
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_REISERFS_FS_XATTR is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+CONFIG_FUSE_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=850
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=m
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=m
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=m
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+
+#
+# Distributed Lock Manager
+#
+CONFIG_DLM=m
+# CONFIG_DLM_DEBUG is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=m
+CONFIG_CRYPTO_ALGAPI2=m
+CONFIG_CRYPTO_AEAD2=m
+CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_BLKCIPHER2=m
+CONFIG_CRYPTO_HASH=m
+CONFIG_CRYPTO_HASH2=m
+CONFIG_CRYPTO_RNG2=m
+CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_MANAGER2=m
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=m
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=m
+# CONFIG_CRYPTO_LRW is not set
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=m
+# CONFIG_CRYPTO_XCBC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=m
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=m
+CONFIG_CRYPTO_MICHAEL_MIC=m
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=m
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=m
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=m
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=m
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=m
+CONFIG_ZLIB_DEFLATE=m
+CONFIG_LZO_COMPRESS=m
+CONFIG_LZO_DECOMPRESS=m
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3config-CUED
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3config-CUED (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3config-CUED 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,2310 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.36-rc1
+# Sun Aug 22 21:06:12 2010
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_HAVE_PROC_CPU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_ARCH_HAS_CPUFREQ=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_CROSS_COMPILE=""
+CONFIG_LOCALVERSION="-pxa270"
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZMA=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_TINY_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+CONFIG_LBDAF=y
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+CONFIG_INLINE_SPIN_UNLOCK=y
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+CONFIG_INLINE_READ_UNLOCK=y
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+CONFIG_INLINE_WRITE_UNLOCK=y
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+CONFIG_MMU=y
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_VEXPRESS is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_BCMRING is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_CNS3XXX is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_DOVE is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_LPC32XX is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_NUC93X is not set
+# CONFIG_ARCH_TEGRA is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_SHMOBILE is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_S5P6440 is not set
+# CONFIG_ARCH_S5P6442 is not set
+# CONFIG_ARCH_S5PC100 is not set
+# CONFIG_ARCH_S5PV210 is not set
+# CONFIG_ARCH_S5PV310 is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_NOMADIK is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_PLAT_SPEAR is not set
+
+#
+# Intel PXA2xx/PXA3xx Implementations
+#
+
+#
+# Intel/Marvell Dev Platforms (sorted by hardware release time)
+#
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_MACH_ZYLONITE300 is not set
+# CONFIG_MACH_ZYLONITE320 is not set
+# CONFIG_MACH_LITTLETON is not set
+# CONFIG_MACH_TAVOREVB is not set
+# CONFIG_MACH_SAAR is not set
+
+#
+# Third Party Dev Platforms (sorted by vendor name)
+#
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_ARCH_VIPER is not set
+# CONFIG_MACH_ARCOM_ZEUS is not set
+CONFIG_MACH_BALLOON3=y
+CONFIG_BALLOON3_TOPPOLY=y
+# CONFIG_BALLOON3_VGA is not set
+# CONFIG_BALLOON3_SVGA is not set
+# CONFIG_BALLOON3_NODISPLAY is not set
+# CONFIG_MACH_CSB726 is not set
+# CONFIG_MACH_ARMCORE is not set
+# CONFIG_MACH_EM_X270 is not set
+# CONFIG_MACH_EXEDA is not set
+# CONFIG_MACH_CM_X300 is not set
+# CONFIG_MACH_CAPC7117 is not set
+# CONFIG_ARCH_GUMSTIX is not set
+# CONFIG_MACH_INTELMOTE2 is not set
+# CONFIG_MACH_STARGATE2 is not set
+# CONFIG_MACH_XCEP is not set
+# CONFIG_TRIZEPS_PXA is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_PCM027 is not set
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_COLIBRI300 is not set
+# CONFIG_MACH_COLIBRI320 is not set
+# CONFIG_MACH_VPAC270 is not set
+
+#
+# End-user Products (sorted by vendor name)
+#
+# CONFIG_MACH_H4700 is not set
+# CONFIG_MACH_H5000 is not set
+# CONFIG_MACH_HIMALAYA is not set
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_MIOA701 is not set
+# CONFIG_PXA_EZX is not set
+# CONFIG_MACH_MP900C is not set
+# CONFIG_ARCH_PXA_PALM is not set
+# CONFIG_MACH_RAUMFELD_RC is not set
+# CONFIG_MACH_RAUMFELD_CONNECTOR is not set
+# CONFIG_MACH_RAUMFELD_SPEAKER is not set
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_MACH_ICONTROL is not set
+# CONFIG_ARCH_PXA_ESERIES is not set
+# CONFIG_MACH_ZIPIT2 is not set
+CONFIG_PXA27x=y
+CONFIG_PXA_HAVE_BOARD_IRQS=y
+CONFIG_PLAT_PXA=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_LEGACY=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+# CONFIG_ARM_THUMB is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_IWMMXT=y
+CONFIG_XSCALE_PMU=y
+CONFIG_CPU_HAS_PMU=y
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCCARD=y
+CONFIG_PCMCIA=y
+CONFIG_PCMCIA_LOAD_CIS=y
+
+#
+# PC-card bridges
+#
+CONFIG_PCMCIA_SOC_COMMON=y
+CONFIG_PCMCIA_PXA2XX=y
+CONFIG_PCMCIA_DEBUG=y
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+# CONFIG_SPARSE_IRQ is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=999999
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_FORCE_MAX_ZONEORDER=11
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+# CONFIG_CC_STACKPROTECTOR is not set
+# CONFIG_DEPRECATED_PARAM_STRUCT is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+CONFIG_KEXEC=y
+CONFIG_ATAGS_PROC=y
+# CONFIG_AUTO_ZRELADDR is not set
+CONFIG_ZRELADDR=0xa0008000
+
+#
+# CPU Power Management
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=m
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND_NVS=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_APM_EMULATION is not set
+# CONFIG_PM_RUNTIME is not set
+CONFIG_PM_OPS=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_MULTIPLE_TABLES=y
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+# CONFIG_IP_PNP is not set
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE=m
+# CONFIG_NET_IPGRE_BROADCAST is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+# CONFIG_IPV6_SIT_6RD is not set
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+# CONFIG_BRIDGE_NETFILTER is not set
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
+# CONFIG_NETFILTER_NETLINK_LOG is not set
+# CONFIG_NF_CONNTRACK is not set
+# CONFIG_NETFILTER_XTABLES is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_NF_DEFRAG_IPV4 is not set
+CONFIG_IP_NF_QUEUE=m
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+
+#
+# IPv6: Netfilter Configuration
+#
+CONFIG_IP6_NF_QUEUE=m
+# CONFIG_IP6_NF_IPTABLES is not set
+# CONFIG_IP_DCCP is not set
+CONFIG_IP_SCTP=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+CONFIG_SCTP_HMAC_MD5=y
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+CONFIG_STP=m
+CONFIG_BRIDGE=m
+CONFIG_BRIDGE_IGMP_SNOOPING=y
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+CONFIG_NET_SCHED=y
+
+#
+# Queueing/Scheduling
+#
+# CONFIG_NET_SCH_CBQ is not set
+# CONFIG_NET_SCH_HTB is not set
+# CONFIG_NET_SCH_HFSC is not set
+# CONFIG_NET_SCH_PRIO is not set
+# CONFIG_NET_SCH_MULTIQ is not set
+# CONFIG_NET_SCH_RED is not set
+# CONFIG_NET_SCH_SFQ is not set
+# CONFIG_NET_SCH_TEQL is not set
+# CONFIG_NET_SCH_TBF is not set
+# CONFIG_NET_SCH_GRED is not set
+# CONFIG_NET_SCH_DSMARK is not set
+# CONFIG_NET_SCH_NETEM is not set
+# CONFIG_NET_SCH_DRR is not set
+
+#
+# Classification
+#
+# CONFIG_NET_CLS_BASIC is not set
+# CONFIG_NET_CLS_TCINDEX is not set
+# CONFIG_NET_CLS_ROUTE4 is not set
+# CONFIG_NET_CLS_FW is not set
+# CONFIG_NET_CLS_U32 is not set
+# CONFIG_NET_CLS_RSVP is not set
+# CONFIG_NET_CLS_RSVP6 is not set
+# CONFIG_NET_CLS_FLOW is not set
+# CONFIG_NET_EMATCH is not set
+# CONFIG_NET_CLS_ACT is not set
+CONFIG_NET_SCH_FIFO=y
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=m
+CONFIG_BT_L2CAP=m
+CONFIG_BT_SCO=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIBTSDIO=m
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCSP=y
+# CONFIG_BT_HCIUART_ATH3K is not set
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIBCM203X=m
+CONFIG_BT_HCIBPA10X=m
+CONFIG_BT_HCIBFUSB=m
+CONFIG_BT_HCIDTL1=m
+CONFIG_BT_HCIBT3C=m
+CONFIG_BT_HCIBLUECARD=m
+CONFIG_BT_HCIBTUART=m
+CONFIG_BT_HCIVHCI=m
+# CONFIG_BT_MRVL is not set
+# CONFIG_BT_ATH3K is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_FIB_RULES=y
+CONFIG_WIRELESS=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WEXT_CORE=y
+CONFIG_WEXT_PROC=y
+CONFIG_WEXT_SPY=y
+CONFIG_WEXT_PRIV=y
+CONFIG_CFG80211=y
+# CONFIG_NL80211_TESTMODE is not set
+# CONFIG_CFG80211_DEVELOPER_WARNINGS is not set
+# CONFIG_CFG80211_REG_DEBUG is not set
+CONFIG_CFG80211_DEFAULT_PS=y
+# CONFIG_CFG80211_INTERNAL_REGDB is not set
+CONFIG_CFG80211_WEXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_LIB80211=y
+CONFIG_LIB80211_CRYPT_WEP=m
+CONFIG_LIB80211_CRYPT_CCMP=m
+CONFIG_LIB80211_CRYPT_TKIP=m
+CONFIG_LIB80211_DEBUG=y
+CONFIG_MAC80211=y
+CONFIG_MAC80211_HAS_RC=y
+CONFIG_MAC80211_RC_MINSTREL=y
+CONFIG_MAC80211_RC_MINSTREL_HT=y
+CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
+CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
+# CONFIG_MAC80211_MESH is not set
+# CONFIG_MAC80211_LEDS is not set
+# CONFIG_MAC80211_DEBUG_MENU is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_DEVTMPFS is not set
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=y
+# CONFIG_FIRMWARE_IN_KERNEL is not set
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=m
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_TESTS is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_REDBOOT_PARTS=m
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_AFS_PARTS=m
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_CHAR is not set
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_SM_FTL is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_XIP is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND_ECC=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_VERIFY_WRITE=y
+# CONFIG_MTD_SM_COMMON is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_H1900 is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_SHARPSL is not set
+CONFIG_MTD_NAND_BALLOON3=y
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_WL_THRESHOLD=4096
+CONFIG_MTD_UBI_BEB_RESERVE=1
+# CONFIG_MTD_UBI_GLUEBI is not set
+
+#
+# UBI debugging options
+#
+# CONFIG_MTD_UBI_DEBUG is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_DRBD is not set
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_SENSORS_BH1780 is not set
+# CONFIG_HMC6352 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_BMP085 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+CONFIG_EEPROM_93CX6=m
+# CONFIG_IWMC3200TOP is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+CONFIG_RAID_ATTRS=m
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+CONFIG_CHR_DEV_ST=m
+CONFIG_CHR_DEV_OSST=m
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=m
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+CONFIG_SCSI_SPI_ATTRS=m
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_ISCSI_BOOT_SYSFS is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
+# CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
+CONFIG_ATA=m
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_ATA_VERBOSE_ERROR=y
+CONFIG_SATA_PMP=y
+
+#
+# Controllers with non-SFF native interface
+#
+# CONFIG_SATA_AHCI_PLATFORM is not set
+CONFIG_ATA_SFF=y
+
+#
+# SFF controllers with custom DMA interface
+#
+CONFIG_ATA_BMDMA=y
+
+#
+# SATA SFF controllers with BMDMA
+#
+# CONFIG_SATA_MV is not set
+
+#
+# PATA SFF controllers with BMDMA
+#
+# CONFIG_PATA_PXA is not set
+
+#
+# PIO-only SFF controllers
+#
+CONFIG_PATA_PCMCIA=m
+
+#
+# Generic fallback / legacy drivers
+#
+CONFIG_MD=y
+# CONFIG_BLK_DEV_MD is not set
+CONFIG_BLK_DEV_DM=m
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_CRYPT is not set
+# CONFIG_DM_SNAPSHOT is not set
+# CONFIG_DM_MIRROR is not set
+# CONFIG_DM_ZERO is not set
+# CONFIG_DM_MULTIPATH is not set
+# CONFIG_DM_DELAY is not set
+# CONFIG_DM_UEVENT is not set
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=m
+CONFIG_BONDING=m
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=m
+
+#
+# MII PHY device drivers
+#
+CONFIG_MARVELL_PHY=m
+CONFIG_DAVICOM_PHY=m
+CONFIG_QSEMI_PHY=m
+CONFIG_LXT_PHY=m
+CONFIG_CICADA_PHY=m
+CONFIG_VITESSE_PHY=m
+CONFIG_SMSC_PHY=m
+CONFIG_BROADCOM_PHY=m
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=m
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_ETHOC is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_DNET is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+CONFIG_CS89x0=m
+# CONFIG_KS8851_MLL is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_NETDEV_10000 is not set
+CONFIG_WLAN=y
+CONFIG_PCMCIA_RAYCS=m
+CONFIG_LIBERTAS_THINFIRM=m
+# CONFIG_LIBERTAS_THINFIRM_DEBUG is not set
+CONFIG_LIBERTAS_THINFIRM_USB=m
+CONFIG_ATMEL=m
+# CONFIG_PCMCIA_ATMEL is not set
+CONFIG_AT76C50X_USB=m
+CONFIG_AIRO_CS=m
+CONFIG_PCMCIA_WL3501=m
+CONFIG_USB_ZD1201=m
+CONFIG_USB_NET_RNDIS_WLAN=m
+CONFIG_RTL8187=m
+# CONFIG_MAC80211_HWSIM is not set
+CONFIG_ATH_COMMON=m
+# CONFIG_ATH_DEBUG is not set
+# CONFIG_ATH9K_HTC is not set
+CONFIG_AR9170_USB=m
+CONFIG_B43=m
+# CONFIG_B43_PCMCIA is not set
+# CONFIG_B43_SDIO is not set
+CONFIG_B43_PIO=y
+CONFIG_B43_PHY_LP=y
+# CONFIG_B43_DEBUG is not set
+CONFIG_B43LEGACY=m
+# CONFIG_B43LEGACY_DEBUG is not set
+CONFIG_B43LEGACY_DMA=y
+CONFIG_B43LEGACY_PIO=y
+CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
+# CONFIG_B43LEGACY_DMA_MODE is not set
+# CONFIG_B43LEGACY_PIO_MODE is not set
+CONFIG_HOSTAP=m
+CONFIG_HOSTAP_FIRMWARE=y
+CONFIG_HOSTAP_FIRMWARE_NVRAM=y
+CONFIG_HOSTAP_CS=m
+# CONFIG_IWM is not set
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_USB=m
+CONFIG_LIBERTAS_CS=m
+# CONFIG_LIBERTAS_SDIO is not set
+# CONFIG_LIBERTAS_DEBUG is not set
+# CONFIG_LIBERTAS_MESH is not set
+CONFIG_HERMES=m
+# CONFIG_HERMES_PRISM is not set
+CONFIG_HERMES_CACHE_FW_ON_INIT=y
+CONFIG_PCMCIA_HERMES=m
+# CONFIG_PCMCIA_SPECTRUM is not set
+# CONFIG_ORINOCO_USB is not set
+# CONFIG_P54_COMMON is not set
+CONFIG_RT2X00=m
+# CONFIG_RT2500USB is not set
+# CONFIG_RT73USB is not set
+# CONFIG_RT2800USB is not set
+# CONFIG_WL12XX is not set
+# CONFIG_ZD1211RW is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+CONFIG_USB_CATC=m
+CONFIG_USB_KAWETH=m
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_RTL8150=m
+CONFIG_USB_USBNET=m
+CONFIG_USB_NET_AX8817X=m
+CONFIG_USB_NET_CDCETHER=m
+CONFIG_USB_NET_CDC_EEM=m
+CONFIG_USB_NET_DM9601=m
+CONFIG_USB_NET_SMSC75XX=m
+CONFIG_USB_NET_SMSC95XX=m
+CONFIG_USB_NET_GL620A=m
+CONFIG_USB_NET_NET1080=m
+CONFIG_USB_NET_PLUSB=m
+CONFIG_USB_NET_MCS7830=m
+CONFIG_USB_NET_RNDIS_HOST=m
+CONFIG_USB_NET_CDC_SUBSET=m
+CONFIG_USB_ALI_M5632=y
+CONFIG_USB_AN2720=y
+CONFIG_USB_BELKIN=y
+CONFIG_USB_ARMLINUX=y
+# CONFIG_USB_EPSON2888 is not set
+CONFIG_USB_KC2190=y
+CONFIG_USB_NET_ZAURUS=m
+CONFIG_USB_NET_INT51X1=m
+CONFIG_USB_IPHETH=m
+# CONFIG_USB_SIERRA_NET is not set
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+CONFIG_PCMCIA_3C574=m
+CONFIG_PCMCIA_FMVJ18X=m
+CONFIG_PCMCIA_PCNET=m
+CONFIG_PCMCIA_NMCLAN=m
+CONFIG_PCMCIA_SMC91C92=m
+CONFIG_PCMCIA_XIRC2PS=m
+CONFIG_PCMCIA_AXNET=m
+# CONFIG_WAN is not set
+
+#
+# CAIF transport drivers
+#
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_MPPE=m
+CONFIG_PPPOE=m
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLHC=m
+CONFIG_SLIP_SMART=y
+# CONFIG_SLIP_MODE_SLIP6 is not set
+CONFIG_NETCONSOLE=m
+# CONFIG_NETCONSOLE_DYNAMIC is not set
+CONFIG_NETPOLL=y
+# CONFIG_NETPOLL_TRAP is not set
+CONFIG_NET_POLL_CONTROLLER=y
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=m
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+CONFIG_KEYBOARD_ATKBD=m
+# CONFIG_KEYBOARD_QT2160 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+CONFIG_KEYBOARD_GPIO=m
+# CONFIG_KEYBOARD_TCA6416 is not set
+# CONFIG_KEYBOARD_MATRIX is not set
+# CONFIG_KEYBOARD_LM8323 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_MCS is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_PXA27x is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_SENTELIC is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+CONFIG_MOUSE_SERIAL=m
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+# CONFIG_MOUSE_SYNAPTICS_I2C is not set
+CONFIG_INPUT_JOYSTICK=y
+# CONFIG_JOYSTICK_ANALOG is not set
+# CONFIG_JOYSTICK_A3D is not set
+CONFIG_JOYSTICK_ADI=y
+# CONFIG_JOYSTICK_COBRA is not set
+# CONFIG_JOYSTICK_GF2K is not set
+# CONFIG_JOYSTICK_GRIP is not set
+# CONFIG_JOYSTICK_GRIP_MP is not set
+# CONFIG_JOYSTICK_GUILLEMOT is not set
+# CONFIG_JOYSTICK_INTERACT is not set
+# CONFIG_JOYSTICK_SIDEWINDER is not set
+# CONFIG_JOYSTICK_TMDC is not set
+# CONFIG_JOYSTICK_IFORCE is not set
+CONFIG_JOYSTICK_WARRIOR=m
+# CONFIG_JOYSTICK_MAGELLAN is not set
+# CONFIG_JOYSTICK_SPACEORB is not set
+# CONFIG_JOYSTICK_SPACEBALL is not set
+# CONFIG_JOYSTICK_STINGER is not set
+# CONFIG_JOYSTICK_TWIDJOY is not set
+# CONFIG_JOYSTICK_ZHENHUA is not set
+CONFIG_JOYSTICK_JOYDUMP=m
+CONFIG_JOYSTICK_XPAD=m
+CONFIG_JOYSTICK_XPAD_FF=y
+CONFIG_JOYSTICK_XPAD_LEDS=y
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_AD7879 is not set
+# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
+# CONFIG_TOUCHSCREEN_DYNAPRO is not set
+# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
+# CONFIG_TOUCHSCREEN_EETI is not set
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MCS5000 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_QT602240 is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+CONFIG_TOUCHSCREEN_UCB1400=m
+# CONFIG_TOUCHSCREEN_WM97XX is not set
+CONFIG_TOUCHSCREEN_USB_COMPOSITE=m
+CONFIG_TOUCHSCREEN_USB_EGALAX=y
+CONFIG_TOUCHSCREEN_USB_PANJIT=y
+CONFIG_TOUCHSCREEN_USB_3M=y
+CONFIG_TOUCHSCREEN_USB_ITM=y
+CONFIG_TOUCHSCREEN_USB_ETURBO=y
+CONFIG_TOUCHSCREEN_USB_GUNZE=y
+CONFIG_TOUCHSCREEN_USB_DMC_TSC10=y
+CONFIG_TOUCHSCREEN_USB_IRTOUCH=y
+CONFIG_TOUCHSCREEN_USB_IDEALTEK=y
+CONFIG_TOUCHSCREEN_USB_GENERAL_TOUCH=y
+CONFIG_TOUCHSCREEN_USB_GOTOP=y
+CONFIG_TOUCHSCREEN_USB_JASTEC=y
+CONFIG_TOUCHSCREEN_USB_E2I=y
+CONFIG_TOUCHSCREEN_USB_ZYTRONIC=y
+CONFIG_TOUCHSCREEN_USB_ETT_TC45USB=y
+CONFIG_TOUCHSCREEN_USB_NEXIO=y
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+# CONFIG_TOUCHSCREEN_W90X900 is not set
+# CONFIG_TOUCHSCREEN_TPS6507X is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_AD714X is not set
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+CONFIG_INPUT_UINPUT=y
+# CONFIG_INPUT_PCF8574 is not set
+# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
+# CONFIG_INPUT_ADXL34X is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=m
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+CONFIG_GAMEPORT=y
+# CONFIG_GAMEPORT_NS558 is not set
+# CONFIG_GAMEPORT_L4 is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_DEVKMEM is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_MINIPUG is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
+# CONFIG_IPWIRELESS is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_RAMOOPS is not set
+CONFIG_SAMOSA=y
+# CONFIG_PROC_SAMOSA is not set
+CONFIG_I2C=m
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=m
+# CONFIG_I2C_MUX is not set
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=m
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_DESIGNWARE is not set
+CONFIG_I2C_GPIO=m
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+CONFIG_I2C_PXA=m
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_SPI is not set
+
+#
+# PPS support
+#
+# CONFIG_PPS is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+CONFIG_GPIO_SYSFS=y
+
+#
+# Memory mapped GPIO expanders:
+#
+# CONFIG_GPIO_IT8761E is not set
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX7300 is not set
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+# CONFIG_GPIO_ADP5588 is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+
+#
+# AC97 GPIO expanders:
+#
+# CONFIG_GPIO_UCB1400 is not set
+
+#
+# MODULbus GPIO expanders:
+#
+CONFIG_W1=m
+CONFIG_W1_CON=y
+
+#
+# 1-wire Bus Masters
+#
+CONFIG_W1_MASTER_DS2490=m
+CONFIG_W1_MASTER_DS2482=m
+# CONFIG_W1_MASTER_DS1WM is not set
+# CONFIG_W1_MASTER_GPIO is not set
+
+#
+# 1-wire Slaves
+#
+CONFIG_W1_SLAVE_THERM=m
+CONFIG_W1_SLAVE_SMEM=m
+# CONFIG_W1_SLAVE_DS2431 is not set
+CONFIG_W1_SLAVE_DS2433=m
+# CONFIG_W1_SLAVE_DS2433_CRC is not set
+# CONFIG_W1_SLAVE_DS2760 is not set
+# CONFIG_W1_SLAVE_BQ27000 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_SA1100_WATCHDOG=m
+# CONFIG_MAX63XX_WATCHDOG is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB=m
+CONFIG_SSB_BLOCKIO=y
+CONFIG_SSB_PCMCIAHOST_POSSIBLE=y
+# CONFIG_SSB_PCMCIAHOST is not set
+CONFIG_SSB_SDIOHOST_POSSIBLE=y
+# CONFIG_SSB_SDIOHOST is not set
+# CONFIG_SSB_DEBUG is not set
+CONFIG_MFD_SUPPORT=y
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+CONFIG_UCB1400_CORE=m
+# CONFIG_TPS65010 is not set
+# CONFIG_TPS6507X is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_MFD_TPS6586X is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_UVESA is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_PXA=y
+# CONFIG_FB_PXA_OVERLAY is not set
+# CONFIG_FB_PXA_SMARTPANEL is not set
+CONFIG_FB_PXA_PARAMETERS=y
+# CONFIG_FB_MINIPUG is not set
+# CONFIG_FB_MBX is not set
+# CONFIG_FB_W100 is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+# CONFIG_FB_BROADSHEET is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+CONFIG_LCD_PLATFORM=m
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+# CONFIG_BACKLIGHT_ADP8860 is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+CONFIG_SOUND=m
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SOUND_OSS_CORE_PRECLAIM=y
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+CONFIG_SND_JACK=y
+CONFIG_SND_SEQUENCER=m
+# CONFIG_SND_SEQ_DUMMY is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+CONFIG_SND_SEQUENCER_OSS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_VMASTER=y
+# CONFIG_SND_RAWMIDI_SEQ is not set
+# CONFIG_SND_OPL3_LIB_SEQ is not set
+# CONFIG_SND_OPL4_LIB_SEQ is not set
+# CONFIG_SND_SBAWE_SEQ is not set
+# CONFIG_SND_EMU10K1_SEQ is not set
+CONFIG_SND_AC97_CODEC=m
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_VIRMIDI is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+CONFIG_SND_AC97_POWER_SAVE=y
+CONFIG_SND_AC97_POWER_SAVE_DEFAULT=2
+CONFIG_SND_ARM=y
+CONFIG_SND_PXA2XX_PCM=m
+CONFIG_SND_PXA2XX_LIB=m
+CONFIG_SND_PXA2XX_LIB_AC97=y
+CONFIG_SND_PXA2XX_AC97=m
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_UA101 is not set
+# CONFIG_SND_USB_CAIAQ is not set
+# CONFIG_SND_PCMCIA is not set
+CONFIG_SND_SOC=m
+CONFIG_SND_PXA2XX_SOC=m
+CONFIG_SND_SOC_I2C_AND_SPI=m
+# CONFIG_SND_SOC_ALL_CODECS is not set
+# CONFIG_SOUND_PRIME is not set
+CONFIG_AC97_BUS=m
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=m
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=m
+CONFIG_HID_PID=y
+CONFIG_USB_HIDDEV=y
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_3M_PCT is not set
+CONFIG_HID_A4TECH=m
+# CONFIG_HID_ACRUX_FF is not set
+CONFIG_HID_APPLE=m
+CONFIG_HID_BELKIN=m
+# CONFIG_HID_CANDO is not set
+CONFIG_HID_CHERRY=m
+CONFIG_HID_CHICONY=m
+# CONFIG_HID_PRODIKEYS is not set
+CONFIG_HID_CYPRESS=m
+CONFIG_HID_DRAGONRISE=m
+# CONFIG_DRAGONRISE_FF is not set
+# CONFIG_HID_EGALAX is not set
+# CONFIG_HID_ELECOM is not set
+CONFIG_HID_EZKEY=m
+CONFIG_HID_KYE=m
+CONFIG_HID_GYRATION=m
+CONFIG_HID_TWINHAN=m
+CONFIG_HID_KENSINGTON=m
+CONFIG_HID_LOGITECH=m
+CONFIG_LOGITECH_FF=y
+CONFIG_LOGIRUMBLEPAD2_FF=y
+# CONFIG_LOGIG940_FF is not set
+# CONFIG_HID_MAGICMOUSE is not set
+CONFIG_HID_MICROSOFT=m
+# CONFIG_HID_MOSART is not set
+CONFIG_HID_MONTEREY=m
+CONFIG_HID_NTRIG=m
+CONFIG_HID_ORTEK=m
+CONFIG_HID_PANTHERLORD=m
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=m
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_QUANTA is not set
+# CONFIG_HID_ROCCAT is not set
+# CONFIG_HID_ROCCAT_KONE is not set
+CONFIG_HID_SAMSUNG=m
+CONFIG_HID_SONY=m
+# CONFIG_HID_STANTUM is not set
+CONFIG_HID_SUNPLUS=m
+CONFIG_HID_GREENASIA=m
+# CONFIG_GREENASIA_FF is not set
+CONFIG_HID_SMARTJOYPLUS=m
+# CONFIG_SMARTJOYPLUS_FF is not set
+CONFIG_HID_TOPSEED=m
+CONFIG_HID_THRUSTMASTER=m
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_HID_WACOM is not set
+CONFIG_HID_ZEROPLUS=m
+# CONFIG_ZEROPLUS_FF is not set
+# CONFIG_HID_ZYDACRON is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_MON=m
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_ISP1362_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+CONFIG_USB_ACM=m
+CONFIG_USB_PRINTER=m
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_ISD200 is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+CONFIG_USB_LIBUSUAL=y
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+CONFIG_USB_SERIAL=m
+CONFIG_USB_EZUSB=y
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_AIRCABLE=m
+CONFIG_USB_SERIAL_ARK3116=m
+CONFIG_USB_SERIAL_BELKIN=m
+# CONFIG_USB_SERIAL_CH341 is not set
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+# CONFIG_USB_SERIAL_CP210X is not set
+CONFIG_USB_SERIAL_CYPRESS_M8=m
+# CONFIG_USB_SERIAL_EMPEG is not set
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_FUNSOFT=m
+# CONFIG_USB_SERIAL_VISOR is not set
+CONFIG_USB_SERIAL_IPAQ=m
+CONFIG_USB_SERIAL_IR=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT_TI=m
+CONFIG_USB_SERIAL_GARMIN=m
+CONFIG_USB_SERIAL_IPW=m
+# CONFIG_USB_SERIAL_IUU is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+# CONFIG_USB_SERIAL_KEYSPAN is not set
+CONFIG_USB_SERIAL_KLSI=m
+CONFIG_USB_SERIAL_KOBIL_SCT=m
+CONFIG_USB_SERIAL_MCT_U232=m
+CONFIG_USB_SERIAL_MOS7720=m
+CONFIG_USB_SERIAL_MOS7840=m
+# CONFIG_USB_SERIAL_MOTOROLA is not set
+CONFIG_USB_SERIAL_NAVMAN=m
+CONFIG_USB_SERIAL_PL2303=m
+# CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_QCAUX is not set
+# CONFIG_USB_SERIAL_QUALCOMM is not set
+# CONFIG_USB_SERIAL_SPCP8X5 is not set
+CONFIG_USB_SERIAL_HP4X=m
+CONFIG_USB_SERIAL_SAFE=m
+CONFIG_USB_SERIAL_SAFE_PADDED=y
+# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
+CONFIG_USB_SERIAL_SIERRAWIRELESS=m
+# CONFIG_USB_SERIAL_SYMBOL is not set
+CONFIG_USB_SERIAL_TI=m
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_XIRCOM=m
+CONFIG_USB_SERIAL_WWAN=m
+CONFIG_USB_SERIAL_OPTION=m
+CONFIG_USB_SERIAL_OMNINET=m
+# CONFIG_USB_SERIAL_OPTICON is not set
+# CONFIG_USB_SERIAL_VIVOPAY_SERIAL is not set
+# CONFIG_USB_SERIAL_ZIO is not set
+# CONFIG_USB_SERIAL_SSU100 is not set
+CONFIG_USB_SERIAL_DEBUG=m
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG is not set
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_R8A66597 is not set
+CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=y
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+CONFIG_USB_ZERO=m
+# CONFIG_USB_AUDIO is not set
+CONFIG_USB_ETH=m
+CONFIG_USB_ETH_RNDIS=y
+CONFIG_USB_ETH_RNDIS_COMPAT=y
+# CONFIG_USB_ETH_EEM is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FUNCTIONFS is not set
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+# CONFIG_USB_MASS_STORAGE is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+CONFIG_USB_CDC_COMPOSITE=m
+# CONFIG_USB_G_MULTI is not set
+# CONFIG_USB_G_HID is not set
+# CONFIG_USB_G_DBGP is not set
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+CONFIG_USB_GPIO_VBUS=m
+# CONFIG_USB_ULPI is not set
+# CONFIG_NOP_USB_XCEIV is not set
+CONFIG_MMC=m
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=m
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_PXA=m
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MEMSTICK is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_GPIO_PLATFORM=y
+# CONFIG_LEDS_LP3944 is not set
+# CONFIG_LEDS_PCA955X is not set
+# CONFIG_LEDS_BD2802 is not set
+# CONFIG_LEDS_LT3593 is not set
+CONFIG_LEDS_TRIGGERS=y
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
+# CONFIG_LEDS_TRIGGER_GPIO is not set
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+
+#
+# iptables trigger is under Netfilter config (LED target)
+#
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS3232 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_ISL12022 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_BQ32K is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+# CONFIG_RTC_DRV_RX8025 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_MSM6242 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_RP5C01 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_SA1100 is not set
+CONFIG_RTC_DRV_PXA=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=m
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=m
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_REISERFS_FS_XATTR is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_FANOTIFY is not set
+# CONFIG_QUOTA is not set
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+CONFIG_FUSE_FS=m
+# CONFIG_CUSE is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=850
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=m
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=m
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_YAFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_UBIFS_FS=y
+# CONFIG_UBIFS_FS_XATTR is not set
+# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set
+CONFIG_UBIFS_FS_LZO=y
+CONFIG_UBIFS_FS_ZLIB=y
+# CONFIG_UBIFS_FS_DEBUG is not set
+# CONFIG_LOGFS is not set
+CONFIG_CRAMFS=m
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+# CONFIG_CEPH_FS is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=y
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+CONFIG_DLM=m
+# CONFIG_DLM_DEBUG is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+# CONFIG_LOCKUP_DETECTOR is not set
+# CONFIG_HARDLOCKUP_DETECTOR is not set
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_DEBUG_CREDENTIALS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_ATOMIC64_SELFTEST is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+# CONFIG_OC_ETM is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=m
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_MANAGER_TESTS=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=m
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_LRW is not set
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
+CONFIG_CRYPTO_HMAC=m
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=m
+# CONFIG_CRYPTO_GHASH is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=m
+CONFIG_CRYPTO_MICHAEL_MIC=m
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+CONFIG_CRYPTO_SHA1=m
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_ANUBIS is not set
+CONFIG_CRYPTO_ARC4=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_ZLIB is not set
+CONFIG_CRYPTO_LZO=y
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=m
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+CONFIG_CRC_ITU_T=m
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=m
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
+CONFIG_GENERIC_ATOMIC64=y
Added: balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3config-podpoint
===================================================================
--- balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3config-podpoint (rev 0)
+++ balloon/branches/menuconfig/kernel/2.6.36-rc1/balloon3config-podpoint 2010-08-22 21:25:46 UTC (rev 1205)
@@ -0,0 +1,2052 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.29-rc7
+# Thu Mar 5 14:02:02 2009
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+# CONFIG_NO_IOPORT is not set
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+# CONFIG_ARCH_HAS_ILOG2_U32 is not set
+# CONFIG_ARCH_HAS_ILOG2_U64 is not set
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ARCH_MTD_XIP=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION="-pxa270"
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_COMPAT_BRK=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+
+#
+# Block layer
+#
+CONFIG_BLOCK=y
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_FREEZER=y
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IMX is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_PNX4008 is not set
+CONFIG_ARCH_PXA=y
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_DAVINCI is not set
+# CONFIG_ARCH_OMAP is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_W90X900 is not set
+
+#
+# Intel PXA2xx/PXA3xx Implementations
+#
+# CONFIG_ARCH_GUMSTIX is not set
+# CONFIG_MACH_INTELMOTE2 is not set
+# CONFIG_ARCH_LUBBOCK is not set
+# CONFIG_MACH_LOGICPD_PXA270 is not set
+# CONFIG_MACH_MAINSTONE is not set
+# CONFIG_MACH_MP900C is not set
+CONFIG_MACH_BALLOON3=y
+CONFIG_BALLOON3_TOPPOLY=y
+# CONFIG_BALLOON3_VGA is not set
+# CONFIG_BALLOON3_SVGA is not set
+# CONFIG_BALLOON3_NODISPLAY is not set
+# CONFIG_ARCH_PXA_IDP is not set
+# CONFIG_PXA_SHARPSL is not set
+# CONFIG_ARCH_VIPER is not set
+# CONFIG_ARCH_PXA_ESERIES is not set
+# CONFIG_TRIZEPS_PXA is not set
+# CONFIG_MACH_H5000 is not set
+# CONFIG_MACH_EM_X270 is not set
+# CONFIG_MACH_COLIBRI is not set
+# CONFIG_MACH_ZYLONITE is not set
+# CONFIG_MACH_LITTLETON is not set
+# CONFIG_MACH_TAVOREVB is not set
+# CONFIG_MACH_SAAR is not set
+# CONFIG_MACH_ARMCORE is not set
+# CONFIG_MACH_CM_X300 is not set
+# CONFIG_MACH_MAGICIAN is not set
+# CONFIG_MACH_MIOA701 is not set
+# CONFIG_MACH_PCM027 is not set
+# CONFIG_ARCH_PXA_PALM is not set
+# CONFIG_PXA_EZX is not set
+CONFIG_PXA27x=y
+# CONFIG_PXA_PWM is not set
+CONFIG_PXA_HAVE_BOARD_IRQS=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_XSCALE=y
+CONFIG_CPU_32v5=y
+CONFIG_CPU_ABRT_EV5T=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_VIVT=y
+CONFIG_CPU_TLB_V4WBI=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+# CONFIG_ARM_THUMB is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_OUTER_CACHE is not set
+CONFIG_IWMMXT=y
+CONFIG_XSCALE_PMU=y
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+CONFIG_PCCARD=m
+CONFIG_PCMCIA_DEBUG=y
+CONFIG_PCMCIA=m
+CONFIG_PCMCIA_LOAD_CIS=y
+# CONFIG_PCMCIA_IOCTL is not set
+
+#
+# PC-card bridges
+#
+CONFIG_PCMCIA_PXA2XX=m
+
+#
+# Kernel Features
+#
+CONFIG_TICK_ONESHOT=y
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=100
+# CONFIG_AEABI is not set
+# CONFIG_OABI_COMPAT is not set
+CONFIG_ARCH_FLATMEM_HAS_HOLES=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4096
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+# CONFIG_LEDS is not set
+CONFIG_ALIGNMENT_TRAP=y
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_CMDLINE=""
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_TABLE=y
+# CONFIG_CPU_FREQ_DEBUG is not set
+CONFIG_CPU_FREQ_STAT=y
+# CONFIG_CPU_FREQ_STAT_DETAILS is not set
+CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
+# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
+# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
+CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=m
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_APM_EMULATION is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+CONFIG_NETDEVICES=y
+CONFIG_TUN=m
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=m
+CONFIG_NET_PCI=y
+CONFIG_CS89x0=m
+
+#
+# Networking options
+#
+CONFIG_COMPAT_NET_DEV_OPS=y
+CONFIG_PACKET=y
+CONFIG_PACKET_MMAP=y
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_XFRM_STATISTICS is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_ASK_IP_FIB_HASH=y
+# CONFIG_IP_FIB_TRIE is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_MULTIPLE_TABLES=y
+# CONFIG_IP_ROUTE_MULTIPATH is not set
+# CONFIG_IP_ROUTE_VERBOSE is not set
+# CONFIG_IP_PNP is not set
+CONFIG_NET_IPIP=m
+CONFIG_NET_IPGRE=m
+# CONFIG_NET_IPGRE_BROADCAST is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+CONFIG_INET_TUNNEL=m
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+CONFIG_IPV6=m
+# CONFIG_IPV6_PRIVACY is not set
+# CONFIG_IPV6_ROUTER_PREF is not set
+# CONFIG_IPV6_OPTIMISTIC_DAD is not set
+# CONFIG_INET6_AH is not set
+# CONFIG_INET6_ESP is not set
+# CONFIG_INET6_IPCOMP is not set
+# CONFIG_IPV6_MIP6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+CONFIG_INET6_XFRM_MODE_TRANSPORT=m
+CONFIG_INET6_XFRM_MODE_TUNNEL=m
+CONFIG_INET6_XFRM_MODE_BEET=m
+# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
+CONFIG_IPV6_SIT=m
+CONFIG_IPV6_NDISC_NODETYPE=y
+# CONFIG_IPV6_TUNNEL is not set
+# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
+# CONFIG_NETWORK_SECMARK is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+CONFIG_NETFILTER_ADVANCED=y
+# CONFIG_BRIDGE_NETFILTER is not set
+
+#
+# Core Netfilter Configuration
+#
+# CONFIG_NETFILTER_NETLINK_QUEUE is not set
+# CONFIG_NETFILTER_NETLINK_LOG is not set
+# CONFIG_NF_CONNTRACK is not set
+# CONFIG_NETFILTER_XTABLES is not set
+# CONFIG_IP_VS is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_NF_DEFRAG_IPV4 is not set
+CONFIG_IP_NF_QUEUE=m
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+
+#
+# IPv6: Netfilter Configuration
+#
+CONFIG_IP6_NF_QUEUE=m
+# CONFIG_IP6_NF_IPTABLES is not set
+# CONFIG_IP_DCCP is not set
+CONFIG_IP_SCTP=m
+# CONFIG_SCTP_DBG_MSG is not set
+# CONFIG_SCTP_DBG_OBJCNT is not set
+# CONFIG_SCTP_HMAC_NONE is not set
+# CONFIG_SCTP_HMAC_SHA1 is not set
+CONFIG_SCTP_HMAC_MD5=y
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+CONFIG_STP=m
+CONFIG_BRIDGE=m
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+CONFIG_LLC=m
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+CONFIG_NET_SCHED=y
+
+#
+# Queueing/Scheduling
+#
+# CONFIG_NET_SCH_CBQ is not set
+# CONFIG_NET_SCH_HTB is not set
+# CONFIG_NET_SCH_HFSC is not set
+# CONFIG_NET_SCH_PRIO is not set
+# CONFIG_NET_SCH_MULTIQ is not set
+# CONFIG_NET_SCH_RED is not set
+# CONFIG_NET_SCH_SFQ is not set
+# CONFIG_NET_SCH_TEQL is not set
+# CONFIG_NET_SCH_TBF is not set
+# CONFIG_NET_SCH_GRED is not set
+# CONFIG_NET_SCH_DSMARK is not set
+# CONFIG_NET_SCH_NETEM is not set
+# CONFIG_NET_SCH_DRR is not set
+
+#
+# Classification
+#
+# CONFIG_NET_CLS_BASIC is not set
+# CONFIG_NET_CLS_TCINDEX is not set
+# CONFIG_NET_CLS_ROUTE4 is not set
+# CONFIG_NET_CLS_FW is not set
+# CONFIG_NET_CLS_U32 is not set
+# CONFIG_NET_CLS_RSVP is not set
+# CONFIG_NET_CLS_RSVP6 is not set
+# CONFIG_NET_CLS_FLOW is not set
+# CONFIG_NET_EMATCH is not set
+# CONFIG_NET_CLS_ACT is not set
+CONFIG_NET_SCH_FIFO=y
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+CONFIG_BT=m
+CONFIG_BT_L2CAP=m
+CONFIG_BT_SCO=m
+CONFIG_BT_RFCOMM=m
+CONFIG_BT_RFCOMM_TTY=y
+CONFIG_BT_BNEP=m
+CONFIG_BT_BNEP_MC_FILTER=y
+CONFIG_BT_BNEP_PROTO_FILTER=y
+CONFIG_BT_HIDP=m
+
+#
+# Bluetooth device drivers
+#
+CONFIG_BT_HCIBTUSB=m
+CONFIG_BT_HCIBTSDIO=m
+CONFIG_BT_HCIUART=m
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCSP=y
+CONFIG_BT_HCIUART_LL=y
+CONFIG_BT_HCIBCM203X=m
+CONFIG_BT_HCIBPA10X=m
+CONFIG_BT_HCIBFUSB=m
+CONFIG_BT_HCIDTL1=m
+CONFIG_BT_HCIBT3C=m
+CONFIG_BT_HCIBLUECARD=m
+CONFIG_BT_HCIBTUART=m
+CONFIG_BT_HCIVHCI=m
+# CONFIG_AF_RXRPC is not set
+# CONFIG_PHONET is not set
+CONFIG_FIB_RULES=y
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+CONFIG_WIRELESS_OLD_REGULATORY=y
+CONFIG_WIRELESS_EXT=y
+CONFIG_WIRELESS_EXT_SYSFS=y
+CONFIG_LIB80211=m
+CONFIG_LIB80211_CRYPT_WEP=m
+CONFIG_LIB80211_CRYPT_CCMP=m
+CONFIG_LIB80211_CRYPT_TKIP=m
+# CONFIG_MAC80211 is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=m
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+CONFIG_MTD_REDBOOT_PARTS=m
+CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
+# CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED is not set
+# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_AFS_PARTS=m
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_CHAR is not set
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+# CONFIG_MTD_XIP is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_ARM_INTEGRATOR is not set
+# CONFIG_MTD_SHARP_SL is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_VERIFY_WRITE=y
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+# CONFIG_MTD_NAND_H1900 is not set
+# CONFIG_MTD_NAND_GPIO is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_SHARPSL is not set
+CONFIG_MTD_NAND_BALLOON3=y
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=m
+CONFIG_BLK_DEV_CRYPTOLOOP=m
+CONFIG_BLK_DEV_NBD=m
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+CONFIG_CDROM_PKTCDVD=m
+CONFIG_CDROM_PKTCDVD_BUFFERS=8
+# CONFIG_CDROM_PKTCDVD_WCACHE is not set
+CONFIG_ATA_OVER_ETH=m
+CONFIG_MISC_DEVICES=y
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_93CX6 is not set
+CONFIG_HAVE_IDE=y
+CONFIG_IDE=m
+
+#
+# Please see Documentation/ide/ide.txt for help/info on IDE drives
+#
+CONFIG_IDE_ATAPI=y
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_IDE_GD=m
+CONFIG_IDE_GD_ATA=y
+# CONFIG_IDE_GD_ATAPI is not set
+CONFIG_BLK_DEV_IDECS=m
+CONFIG_BLK_DEV_IDECD=m
+CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
+CONFIG_BLK_DEV_IDETAPE=m
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_PROC_FS=y
+
+#
+# IDE chipset support/bugfixes
+#
+# CONFIG_BLK_DEV_PLATFORM is not set
+# CONFIG_BLK_DEV_IDEDMA is not set
+
+#
+# SCSI device support
+#
+CONFIG_RAID_ATTRS=m
+CONFIG_SCSI=m
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=m
+CONFIG_CHR_DEV_ST=m
+CONFIG_CHR_DEV_OSST=m
+CONFIG_BLK_DEV_SR=m
+# CONFIG_BLK_DEV_SR_VENDOR is not set
+CONFIG_CHR_DEV_SG=m
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
+
+#
+# SCSI Transports
+#
+CONFIG_SCSI_SPI_ATTRS=m
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
+# CONFIG_SCSI_DH is not set
+CONFIG_ATA=m
+# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
+CONFIG_ATA_SFF=y
+# CONFIG_SATA_MV is not set
+CONFIG_PATA_PCMCIA=m
+
+#
+# Multi-device support (RAID and LVM)
+#
+CONFIG_MD=y
+# CONFIG_BLK_DEV_MD is not set
+CONFIG_BLK_DEV_DM=m
+# CONFIG_DM_DEBUG is not set
+# CONFIG_DM_CRYPT is not set
+# CONFIG_DM_SNAPSHOT is not set
+# CONFIG_DM_MIRROR is not set
+# CONFIG_DM_ZERO is not set
+# CONFIG_DM_MULTIPATH is not set
+# CONFIG_DM_DELAY is not set
+# CONFIG_DM_UEVENT is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=m
+CONFIG_BONDING=m
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+CONFIG_TUN=m
+# CONFIG_VETH is not set
+CONFIG_PHYLIB=m
+
+#
+# MII PHY device drivers
+#
+CONFIG_MARVELL_PHY=m
+CONFIG_DAVICOM_PHY=m
+CONFIG_QSEMI_PHY=m
+CONFIG_LXT_PHY=m
+CONFIG_CICADA_PHY=m
+CONFIG_VITESSE_PHY=m
+CONFIG_SMSC_PHY=m
+CONFIG_BROADCOM_PHY=m
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=m
+# CONFIG_AX88796 is not set
+# CONFIG_SMC91X is not set
+# CONFIG_DM9000 is not set
+# CONFIG_SMC911X is not set
+# CONFIG_SMSC911X is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
+# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
+# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
+# CONFIG_B44 is not set
+CONFIG_CS89x0=m
+CONFIG_NETDEV_1000=y
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+CONFIG_WLAN_80211=y
+CONFIG_PCMCIA_RAYCS=m
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_USB=m
+CONFIG_LIBERTAS_CS=m
+# CONFIG_LIBERTAS_SDIO is not set
+# CONFIG_LIBERTAS_DEBUG is not set
+CONFIG_HERMES=m
+CONFIG_HERMES_CACHE_FW_ON_INIT=y
+# CONFIG_PCMCIA_HERMES is not set
+# CONFIG_PCMCIA_SPECTRUM is not set
+CONFIG_ATMEL=m
+# CONFIG_PCMCIA_ATMEL is not set
+CONFIG_AIRO_CS=m
+CONFIG_PCMCIA_WL3501=m
+CONFIG_USB_ZD1201=m
+# CONFIG_USB_NET_RNDIS_WLAN is not set
+# CONFIG_IWLWIFI_LEDS is not set
+CONFIG_HOSTAP=m
+CONFIG_HOSTAP_FIRMWARE=y
+CONFIG_HOSTAP_FIRMWARE_NVRAM=y
+CONFIG_HOSTAP_CS=m
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+
+#
+# USB Network Adapters
+#
+CONFIG_USB_CATC=m
+CONFIG_USB_KAWETH=m
+CONFIG_USB_PEGASUS=m
+CONFIG_USB_RTL8150=m
+CONFIG_USB_USBNET=m
+CONFIG_USB_NET_AX8817X=m
+CONFIG_USB_NET_CDCETHER=m
+CONFIG_USB_NET_DM9601=m
+# CONFIG_USB_NET_SMSC95XX is not set
+CONFIG_USB_NET_GL620A=m
+CONFIG_USB_NET_NET1080=m
+CONFIG_USB_NET_PLUSB=m
+CONFIG_USB_NET_MCS7830=m
+CONFIG_USB_NET_RNDIS_HOST=m
+CONFIG_USB_NET_CDC_SUBSET=m
+CONFIG_USB_ALI_M5632=y
+CONFIG_USB_AN2720=y
+CONFIG_USB_BELKIN=y
+CONFIG_USB_ARMLINUX=y
+# CONFIG_USB_EPSON2888 is not set
+CONFIG_USB_KC2190=y
+CONFIG_USB_NET_ZAURUS=m
+CONFIG_NET_PCMCIA=y
+CONFIG_PCMCIA_3C589=m
+CONFIG_PCMCIA_3C574=m
+CONFIG_PCMCIA_FMVJ18X=m
+CONFIG_PCMCIA_PCNET=m
+CONFIG_PCMCIA_NMCLAN=m
+CONFIG_PCMCIA_SMC91C92=m
+CONFIG_PCMCIA_XIRC2PS=m
+CONFIG_PCMCIA_AXNET=m
+# CONFIG_WAN is not set
+CONFIG_PPP=m
+CONFIG_PPP_MULTILINK=y
+CONFIG_PPP_FILTER=y
+CONFIG_PPP_ASYNC=m
+# CONFIG_PPP_SYNC_TTY is not set
+CONFIG_PPP_DEFLATE=m
+CONFIG_PPP_BSDCOMP=m
+CONFIG_PPP_MPPE=m
+CONFIG_PPPOE=m
+# CONFIG_PPPOL2TP is not set
+CONFIG_SLIP=m
+CONFIG_SLIP_COMPRESSED=y
+CONFIG_SLHC=m
+CONFIG_SLIP_SMART=y
+# CONFIG_SLIP_MODE_SLIP6 is not set
+CONFIG_NETCONSOLE=m
+# CONFIG_NETCONSOLE_DYNAMIC is not set
+CONFIG_NETPOLL=y
+# CONFIG_NETPOLL_TRAP is not set
+CONFIG_NET_POLL_CONTROLLER=y
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+CONFIG_INPUT_FF_MEMLESS=m
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=640
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+CONFIG_KEYBOARD_ATKBD=m
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_PXA27x is not set
+CONFIG_KEYBOARD_GPIO=m
+CONFIG_INPUT_MOUSE=y
+CONFIG_MOUSE_PS2=m
+CONFIG_MOUSE_PS2_ALPS=y
+CONFIG_MOUSE_PS2_LOGIPS2PP=y
+CONFIG_MOUSE_PS2_SYNAPTICS=y
+CONFIG_MOUSE_PS2_TRACKPOINT=y
+# CONFIG_MOUSE_PS2_ELANTECH is not set
+# CONFIG_MOUSE_PS2_TOUCHKIT is not set
+CONFIG_MOUSE_SERIAL=m
+# CONFIG_MOUSE_APPLETOUCH is not set
+# CONFIG_MOUSE_BCM5974 is not set
+# CONFIG_MOUSE_VSXXXAA is not set
+# CONFIG_MOUSE_GPIO is not set
+CONFIG_INPUT_JOYSTICK=y
+# CONFIG_JOYSTICK_ANALOG is not set
+# CONFIG_JOYSTICK_A3D is not set
+# CONFIG_JOYSTICK_ADI is not set
+# CONFIG_JOYSTICK_COBRA is not set
+# CONFIG_JOYSTICK_GF2K is not set
+# CONFIG_JOYSTICK_GRIP is not set
+# CONFIG_JOYSTICK_GRIP_MP is not set
+# CONFIG_JOYSTICK_GUILLEMOT is not set
+# CONFIG_JOYSTICK_INTERACT is not set
+# CONFIG_JOYSTICK_SIDEWINDER is not set
+# CONFIG_JOYSTICK_TMDC is not set
+# CONFIG_JOYSTICK_IFORCE is not set
+# CONFIG_JOYSTICK_WARRIOR is not set
+# CONFIG_JOYSTICK_MAGELLAN is not set
+# CONFIG_JOYSTICK_SPACEORB is not set
+# CONFIG_JOYSTICK_SPACEBALL is not set
+# CONFIG_JOYSTICK_STINGER is not set
+# CONFIG_JOYSTICK_TWIDJOY is not set
+# CONFIG_JOYSTICK_ZHENHUA is not set
+# CONFIG_JOYSTICK_JOYDUMP is not set
+# CONFIG_JOYSTICK_XPAD is not set
+# CONFIG_INPUT_TABLET is not set
+CONFIG_INPUT_TOUCHSCREEN=y
+# CONFIG_TOUCHSCREEN_FUJITSU is not set
+# CONFIG_TOUCHSCREEN_GUNZE is not set
+# CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
+# CONFIG_TOUCHSCREEN_MTOUCH is not set
+# CONFIG_TOUCHSCREEN_INEXIO is not set
+# CONFIG_TOUCHSCREEN_MK712 is not set
+# CONFIG_TOUCHSCREEN_PENMOUNT is not set
+# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
+# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
+CONFIG_TOUCHSCREEN_UCB1400=m
+# CONFIG_TOUCHSCREEN_WM97XX is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
+# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
+CONFIG_INPUT_MISC=y
+# CONFIG_INPUT_ATI_REMOTE is not set
+# CONFIG_INPUT_ATI_REMOTE2 is not set
+# CONFIG_INPUT_KEYSPAN_REMOTE is not set
+# CONFIG_INPUT_POWERMATE is not set
+# CONFIG_INPUT_YEALINK is not set
+# CONFIG_INPUT_CM109 is not set
+CONFIG_INPUT_UINPUT=y
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+CONFIG_SERIO_LIBPS2=m
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=m
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_SAMOSA_PODPOINT=m
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_PXA=y
+CONFIG_SERIAL_PXA_CONSOLE=y
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_LMR5428=m
+CONFIG_TSL2560=m
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+
+#
+# PCMCIA character devices
+#
+# CONFIG_SYNCLINK_CS is not set
+# CONFIG_CARDMAN_4000 is not set
+# CONFIG_CARDMAN_4040 is not set
+# CONFIG_IPWIRELESS is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_SAMOSA=m
+# CONFIG_PROC_SAMOSA is not set
+CONFIG_I2C=m
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=m
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=m
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+CONFIG_I2C_GPIO=m
+# CONFIG_I2C_OCORES is not set
+CONFIG_I2C_PXA=m
+# CONFIG_I2C_PXA_SLAVE is not set
+# CONFIG_I2C_SIMTEC is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_STUB is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_DS1682 is not set
+CONFIG_SENSORS_PCF8574=m
+# CONFIG_PCF8575 is not set
+CONFIG_SENSORS_PCA9539=m
+CONFIG_SENSORS_PCF8591=m
+CONFIG_SENSORS_MAX6875=m
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+# CONFIG_SPI is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+# CONFIG_GPIO_MAX732X is not set
+# CONFIG_GPIO_PCA953X is not set
+# CONFIG_GPIO_PCF857X is not set
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+CONFIG_W1=m
+CONFIG_W1_CON=y
+
+#
+# 1-wire Bus Masters
+#
+CONFIG_W1_MASTER_DS2490=m
+CONFIG_W1_MASTER_DS2482=m
+# CONFIG_W1_MASTER_DS1WM is not set
+# CONFIG_W1_MASTER_GPIO is not set
+
+#
+# 1-wire Slaves
+#
+CONFIG_W1_SLAVE_THERM=m
+CONFIG_W1_SLAVE_SMEM=m
+# CONFIG_W1_SLAVE_DS2431 is not set
+CONFIG_W1_SLAVE_DS2433=m
+# CONFIG_W1_SLAVE_DS2433_CRC is not set
+# CONFIG_W1_SLAVE_DS2760 is not set
+# CONFIG_W1_SLAVE_BQ27000 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_SA1100_WATCHDOG=m
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+CONFIG_UCB1400_CORE=m
+# CONFIG_TPS65010 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
+
+#
+# Multimedia devices
+#
+#
+# Multimedia core support
+#
+CONFIG_VIDEO_DEV=m
+CONFIG_VIDEO_V4L2_COMMON=m
+# CONFIG_VIDEO_ALLOW_V4L1 is not set
+CONFIG_VIDEO_V4L1_COMPAT=y
+# CONFIG_DVB_CORE is not set
+CONFIG_VIDEO_MEDIA=m
+
+#
+# Multimedia drivers
+#
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=m
+# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_MEDIA_TUNER_XC5000=m
+CONFIG_VIDEO_V4L2=m
+# CONFIG_VIDEO_CAPTURE_DRIVERS is not set
+# CONFIG_RADIO_ADAPTERS is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+CONFIG_FB=y
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB_DDC is not set
+# CONFIG_FB_BOOT_VESA_SUPPORT is not set
+CONFIG_FB_CFB_FILLRECT=y
+CONFIG_FB_CFB_COPYAREA=y
+CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_FOREIGN_ENDIAN is not set
+# CONFIG_FB_SYS_FOPS is not set
+# CONFIG_FB_SVGALIB is not set
+# CONFIG_FB_MACMODES is not set
+# CONFIG_FB_BACKLIGHT is not set
+# CONFIG_FB_MODE_HELPERS is not set
+# CONFIG_FB_TILEBLITTING is not set
+
+#
+# Frame buffer hardware drivers
+#
+# CONFIG_FB_UVESA is not set
+# CONFIG_FB_S1D13XXX is not set
+CONFIG_FB_PXA=y
+# CONFIG_FB_PXA_OVERLAY is not set
+# CONFIG_FB_PXA_SMARTPANEL is not set
+CONFIG_FB_PXA_PARAMETERS=y
+# CONFIG_FB_MBX is not set
+# CONFIG_FB_W100 is not set
+# CONFIG_FB_VIRTUAL is not set
+# CONFIG_FB_METRONOME is not set
+# CONFIG_FB_MB862XX is not set
+CONFIG_BACKLIGHT_LCD_SUPPORT=y
+CONFIG_LCD_CLASS_DEVICE=y
+# CONFIG_LCD_ILI9320 is not set
+CONFIG_LCD_PLATFORM=m
+CONFIG_BACKLIGHT_CLASS_DEVICE=y
+CONFIG_BACKLIGHT_GENERIC=y
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE=y
+# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
+# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
+# CONFIG_FONTS is not set
+CONFIG_FONT_8x8=y
+CONFIG_FONT_8x16=y
+CONFIG_LOGO=y
+CONFIG_LOGO_LINUX_MONO=y
+CONFIG_LOGO_LINUX_VGA16=y
+CONFIG_LOGO_LINUX_CLUT224=y
+
+#
+# Sound
+#
+CONFIG_SOUND=m
+CONFIG_SOUND_OSS_CORE=y
+CONFIG_SND=m
+CONFIG_SND_TIMER=m
+CONFIG_SND_PCM=m
+CONFIG_SND_HWDEP=m
+CONFIG_SND_RAWMIDI=m
+CONFIG_SND_SEQUENCER=m
+# CONFIG_SND_SEQ_DUMMY is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=m
+CONFIG_SND_PCM_OSS=m
+CONFIG_SND_PCM_OSS_PLUGINS=y
+CONFIG_SND_SEQUENCER_OSS=y
+# CONFIG_SND_DYNAMIC_MINORS is not set
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_VERBOSE_PROCFS is not set
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+CONFIG_SND_VMASTER=y
+CONFIG_SND_AC97_CODEC=m
+CONFIG_SND_DRIVERS=y
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_VIRMIDI is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+CONFIG_SND_AC97_POWER_SAVE=y
+CONFIG_SND_AC97_POWER_SAVE_DEFAULT=2
+CONFIG_SND_ARM=y
+CONFIG_SND_PXA2XX_PCM=m
+CONFIG_SND_PXA2XX_LIB=m
+CONFIG_SND_PXA2XX_LIB_AC97=y
+CONFIG_SND_PXA2XX_AC97=m
+CONFIG_SND_USB=y
+CONFIG_SND_USB_AUDIO=m
+# CONFIG_SND_USB_CAIAQ is not set
+CONFIG_SND_PCMCIA=y
+# CONFIG_SND_VXPOCKET is not set
+# CONFIG_SND_PDAUDIOCF is not set
+CONFIG_SND_SOC=m
+# CONFIG_SND_PXA2XX_SOC is not set
+CONFIG_SND_SOC_I2C_AND_SPI=m
+# CONFIG_SND_SOC_ALL_CODECS is not set
+# CONFIG_SOUND_PRIME is not set
+CONFIG_AC97_BUS=m
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=m
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=m
+CONFIG_HID_PID=y
+CONFIG_USB_HIDDEV=y
+
+#
+# Special HID drivers
+#
+CONFIG_HID_COMPAT=y
+CONFIG_HID_A4TECH=m
+CONFIG_HID_APPLE=m
+CONFIG_HID_BELKIN=m
+CONFIG_HID_CHERRY=m
+CONFIG_HID_CHICONY=m
+CONFIG_HID_CYPRESS=m
+CONFIG_HID_EZKEY=m
+CONFIG_HID_GYRATION=m
+CONFIG_HID_LOGITECH=m
+CONFIG_LOGITECH_FF=y
+# CONFIG_LOGIRUMBLEPAD2_FF is not set
+CONFIG_HID_MICROSOFT=m
+CONFIG_HID_MONTEREY=m
+CONFIG_HID_NTRIG=m
+CONFIG_HID_PANTHERLORD=m
+# CONFIG_PANTHERLORD_FF is not set
+CONFIG_HID_PETALYNX=m
+CONFIG_HID_SAMSUNG=m
+CONFIG_HID_SONY=m
+CONFIG_HID_SUNPLUS=m
+# CONFIG_GREENASIA_FF is not set
+CONFIG_HID_TOPSEED=m
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=m
+# CONFIG_USB_DEBUG is not set
+# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_SUSPEND=y
+# CONFIG_USB_OTG is not set
+CONFIG_USB_MON=m
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=m
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_U132_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+# CONFIG_USB_MUSB_HDRC is not set
+# CONFIG_USB_GADGET_MUSB_HDRC is not set
+
+#
+# USB Device Class drivers
+#
+CONFIG_USB_ACM=m
+CONFIG_USB_PRINTER=m
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
+#
+
+#
+# see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=m
+# CONFIG_USB_STORAGE_DEBUG is not set
+CONFIG_USB_STORAGE_DATAFAB=y
+CONFIG_USB_STORAGE_FREECOM=y
+CONFIG_USB_STORAGE_ISD200=y
+CONFIG_USB_STORAGE_USBAT=y
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+CONFIG_USB_STORAGE_JUMPSHOT=y
+CONFIG_USB_STORAGE_ALAUDA=y
+# CONFIG_USB_STORAGE_ONETOUCH is not set
+# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
+CONFIG_USB_LIBUSUAL=y
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+CONFIG_USB_SERIAL=m
+CONFIG_USB_EZUSB=y
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_AIRCABLE=m
+CONFIG_USB_SERIAL_ARK3116=m
+CONFIG_USB_SERIAL_BELKIN=m
+# CONFIG_USB_SERIAL_CH341 is not set
+CONFIG_USB_SERIAL_WHITEHEAT=m
+CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
+CONFIG_USB_SERIAL_CP2101=m
+CONFIG_USB_SERIAL_CYPRESS_M8=m
+# CONFIG_USB_SERIAL_EMPEG is not set
+CONFIG_USB_SERIAL_FTDI_SIO=m
+CONFIG_USB_SERIAL_FUNSOFT=m
+# CONFIG_USB_SERIAL_VISOR is not set
+CONFIG_USB_SERIAL_IPAQ=m
+CONFIG_USB_SERIAL_IR=m
+CONFIG_USB_SERIAL_EDGEPORT=m
+CONFIG_USB_SERIAL_EDGEPORT_TI=m
+CONFIG_USB_SERIAL_GARMIN=m
+CONFIG_USB_SERIAL_IPW=m
+# CONFIG_USB_SERIAL_IUU is not set
+# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
+CONFIG_USB_SERIAL_KEYSPAN=m
+CONFIG_USB_SERIAL_KEYSPAN_MPR=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
+CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19=y
+CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
+CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
+CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
+CONFIG_USB_SERIAL_KLSI=m
+CONFIG_USB_SERIAL_KOBIL_SCT=m
+CONFIG_USB_SERIAL_MCT_U232=m
+CONFIG_USB_SERIAL_MOS7720=m
+CONFIG_USB_SERIAL_MOS7840=m
+# CONFIG_USB_SERIAL_MOTOROLA is not set
+CONFIG_USB_SERIAL_NAVMAN=m
+CONFIG_USB_SERIAL_PL2303=m
+# CONFIG_USB_SERIAL_OTI6858 is not set
+# CONFIG_USB_SERIAL_SPCP8X5 is not set
+CONFIG_USB_SERIAL_HP4X=m
+CONFIG_USB_SERIAL_SAFE=m
+CONFIG_USB_SERIAL_SAFE_PADDED=y
+# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
+CONFIG_USB_SERIAL_SIERRAWIRELESS=m
+CONFIG_USB_SERIAL_TI=m
+CONFIG_USB_SERIAL_CYBERJACK=m
+CONFIG_USB_SERIAL_XIRCOM=m
+CONFIG_USB_SERIAL_OPTION=m
+CONFIG_USB_SERIAL_OMNINET=m
+# CONFIG_USB_SERIAL_OPTICON is not set
+CONFIG_USB_SERIAL_DEBUG=m
+
+#
+# USB Miscellaneous drivers
+#
+CONFIG_USB_EMI62=m
+CONFIG_USB_EMI26=m
+CONFIG_USB_ADUTUX=m
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+CONFIG_USB_LEGOTOWER=m
+CONFIG_USB_LCD=m
+CONFIG_USB_BERRY_CHARGE=m
+CONFIG_USB_LED=m
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+CONFIG_USB_CYTHERM=m
+CONFIG_USB_PHIDGET=m
+CONFIG_USB_PHIDGETKIT=m
+CONFIG_USB_PHIDGETMOTORCONTROL=m
+CONFIG_USB_PHIDGETSERVO=m
+CONFIG_USB_IDMOUSE=m
+CONFIG_USB_FTDI_ELAN=m
+# CONFIG_USB_APPLEDISPLAY is not set
+CONFIG_USB_LD=m
+# CONFIG_USB_TRANCEVIBRATOR is not set
+CONFIG_USB_IOWARRIOR=m
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+CONFIG_USB_GADGET=m
+# CONFIG_USB_GADGET_DEBUG is not set
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+CONFIG_USB_GADGET_PXA27X=y
+CONFIG_USB_PXA27X=m
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+# CONFIG_USB_GADGET_DUALSPEED is not set
+CONFIG_USB_ZERO=m
+CONFIG_USB_ETH=m
+# CONFIG_USB_ETH_RNDIS is not set
+CONFIG_USB_GADGETFS=m
+CONFIG_USB_FILE_STORAGE=m
+# CONFIG_USB_FILE_STORAGE_TEST is not set
+CONFIG_USB_G_SERIAL=m
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+CONFIG_USB_CDC_COMPOSITE=m
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+CONFIG_USB_GPIO_VBUS=m
+CONFIG_MMC=m
+# CONFIG_MMC_DEBUG is not set
+# CONFIG_MMC_UNSAFE_RESUME is not set
+
+#
+# MMC/SD/SDIO Card Drivers
+#
+CONFIG_MMC_BLOCK=m
+CONFIG_MMC_BLOCK_BOUNCE=y
+# CONFIG_SDIO_UART is not set
+# CONFIG_MMC_TEST is not set
+
+#
+# MMC/SD/SDIO Host Controller Drivers
+#
+CONFIG_MMC_PXA=m
+# CONFIG_MMC_SDHCI is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+
+#
+# LED drivers
+#
+# CONFIG_LEDS_PCA9532 is not set
+CONFIG_LEDS_GPIO=y
+# CONFIG_LEDS_PCA955X is not set
+
+#
+# LED Triggers
+#
+CONFIG_LEDS_TRIGGERS=y
+CONFIG_LEDS_TRIGGER_TIMER=y
+CONFIG_LEDS_TRIGGER_IDE_DISK=y
+CONFIG_LEDS_TRIGGER_HEARTBEAT=y
+# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
+# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+# CONFIG_RTC_DRV_DS1307 is not set
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_S35390A is not set
+# CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
+# CONFIG_RTC_DRV_DS1511 is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+# CONFIG_RTC_DRV_SA1100 is not set
+CONFIG_RTC_DRV_PXA=y
+# CONFIG_DMADEVICES is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=m
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=m
+# CONFIG_EXT3_FS_XATTR is not set
+# CONFIG_EXT4_FS is not set
+CONFIG_JBD=m
+CONFIG_REISERFS_FS=m
+# CONFIG_REISERFS_CHECK is not set
+# CONFIG_REISERFS_PROC_INFO is not set
+# CONFIG_REISERFS_FS_XATTR is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FILE_LOCKING=y
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+CONFIG_QUOTA=y
+# CONFIG_QUOTA_NETLINK_INTERFACE is not set
+CONFIG_PRINT_QUOTA_WARNING=y
+# CONFIG_QFMT_V1 is not set
+# CONFIG_QFMT_V2 is not set
+CONFIG_QUOTACTL=y
+CONFIG_AUTOFS_FS=m
+CONFIG_AUTOFS4_FS=m
+CONFIG_FUSE_FS=m
+
+#
+# CD-ROM/DVD Filesystems
+#
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_UDF_NLS=y
+
+#
+# DOS/FAT/NT Filesystems
+#
+CONFIG_FAT_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=m
+CONFIG_FAT_DEFAULT_CODEPAGE=850
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_NTFS_FS=m
+# CONFIG_NTFS_DEBUG is not set
+CONFIG_NTFS_RW=y
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_CONFIGFS_FS=m
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=m
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+CONFIG_CRAMFS=m
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+CONFIG_NFSD=m
+CONFIG_NFSD_V3=y
+# CONFIG_NFSD_V3_ACL is not set
+# CONFIG_NFSD_V4 is not set
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_EXPORTFS=m
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_REGISTER_V4 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+CONFIG_SMB_FS=m
+# CONFIG_SMB_NLS_DEFAULT is not set
+CONFIG_CIFS=m
+# CONFIG_CIFS_STATS is not set
+# CONFIG_CIFS_WEAK_PW_HASH is not set
+# CONFIG_CIFS_XATTR is not set
+# CONFIG_CIFS_DEBUG2 is not set
+# CONFIG_CIFS_EXPERIMENTAL is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+CONFIG_NLS_CODEPAGE_437=m
+CONFIG_NLS_CODEPAGE_737=m
+CONFIG_NLS_CODEPAGE_775=m
+CONFIG_NLS_CODEPAGE_850=m
+CONFIG_NLS_CODEPAGE_852=m
+CONFIG_NLS_CODEPAGE_855=m
+CONFIG_NLS_CODEPAGE_857=m
+CONFIG_NLS_CODEPAGE_860=m
+CONFIG_NLS_CODEPAGE_861=m
+CONFIG_NLS_CODEPAGE_862=m
+CONFIG_NLS_CODEPAGE_863=m
+CONFIG_NLS_CODEPAGE_864=m
+CONFIG_NLS_CODEPAGE_865=m
+CONFIG_NLS_CODEPAGE_866=m
+CONFIG_NLS_CODEPAGE_869=m
+CONFIG_NLS_CODEPAGE_936=m
+CONFIG_NLS_CODEPAGE_950=m
+CONFIG_NLS_CODEPAGE_932=m
+CONFIG_NLS_CODEPAGE_949=m
+CONFIG_NLS_CODEPAGE_874=m
+CONFIG_NLS_ISO8859_8=m
+CONFIG_NLS_CODEPAGE_1250=m
+CONFIG_NLS_CODEPAGE_1251=m
+# CONFIG_NLS_ASCII is not set
+CONFIG_NLS_ISO8859_1=m
+CONFIG_NLS_ISO8859_2=m
+CONFIG_NLS_ISO8859_3=m
+CONFIG_NLS_ISO8859_4=m
+CONFIG_NLS_ISO8859_5=m
+CONFIG_NLS_ISO8859_6=m
+CONFIG_NLS_ISO8859_7=m
+CONFIG_NLS_ISO8859_9=m
+CONFIG_NLS_ISO8859_13=m
+CONFIG_NLS_ISO8859_14=m
+CONFIG_NLS_ISO8859_15=m
+CONFIG_NLS_KOI8_R=m
+CONFIG_NLS_KOI8_U=m
+CONFIG_NLS_UTF8=m
+
+#
+# Distributed Lock Manager
+#
+CONFIG_DLM=m
+# CONFIG_DLM_DEBUG is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+CONFIG_DEBUG_MUTEXES=y
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+CONFIG_FRAME_POINTER=y
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+# CONFIG_DEBUG_USER is not set
+# CONFIG_DEBUG_ERRORS is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+CONFIG_CRYPTO=y
+#
+# Crypto core or helper
+#
+# CONFIG_CRYPTO_FIPS is not set
+CONFIG_CRYPTO_ALGAPI=m
+CONFIG_CRYPTO_ALGAPI2=m
+CONFIG_CRYPTO_AEAD2=m
+CONFIG_CRYPTO_BLKCIPHER=m
+CONFIG_CRYPTO_BLKCIPHER2=m
+CONFIG_CRYPTO_HASH=m
+CONFIG_CRYPTO_HASH2=m
+CONFIG_CRYPTO_RNG2=m
+CONFIG_CRYPTO_MANAGER=m
+CONFIG_CRYPTO_MANAGER2=m
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO
(text/plain)